Since command UPIU is initialized with virtual address that CPU accesses, need to add cache operation.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Haojian Zhuang <[email protected]> --- MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThru.h | 1 + MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruDxe.inf | 1 + MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c | 8 ++++++++ 3 files changed, 10 insertions(+) diff --git a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThru.h b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThru.h index 7fc82ba..af13757 100644 --- a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThru.h +++ b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThru.h @@ -26,6 +26,7 @@ #include <Library/BaseMemoryLib.h> #include <Library/MemoryAllocationLib.h> #include <Library/UefiBootServicesTableLib.h> +#include <Library/CacheMaintenanceLib.h> #include <Library/DevicePathLib.h> #include <Library/TimerLib.h> diff --git a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruDxe.inf b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruDxe.inf index c90c72f..254f51a 100644 --- a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruDxe.inf +++ b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruDxe.inf @@ -49,6 +49,7 @@ BaseMemoryLib UefiLib BaseLib + CacheMaintenanceLib UefiDriverEntryPoint DebugLib DevicePathLib diff --git a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c index db70fb1..98a17ac 100644 --- a/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c +++ b/MdeModulePkg/Bus/Ufs/UfsPassThruDxe/UfsPassThruHci.c @@ -1449,6 +1449,7 @@ UfsExecScsiCmds ( UTP_TR_PRD *PrdtBase; EFI_TPL OldTpl; UFS_PASS_THRU_TRANS_REQ *TransReq; + UINTN TotalLen; TransReq = AllocateZeroPool (sizeof (UFS_PASS_THRU_TRANS_REQ)); if (TransReq == NULL) { @@ -1521,6 +1522,13 @@ UfsExecScsiCmds ( UfsInitUtpPrdt (PrdtBase, (VOID*)(UINTN)DataBufPhyAddr, DataLen); // + // Flush & invalidate data cache since CmdDescHost is virtual address + // and Command UPIU is updated after Map (). + // + TotalLen = (TransReq->Trd->PrdtO << 2) + (TransReq->Trd->PrdtL << 2); + WriteBackInvalidateDataCacheRange (TransReq->CmdDescHost, TotalLen); + + // // Insert the async SCSI cmd to the Async I/O list // if (Event != NULL) { -- 2.7.4 _______________________________________________ edk2-devel mailing list [email protected] https://lists.01.org/mailman/listinfo/edk2-devel
