Cc: Michael D Kinney <[email protected]>
Cc: Liming Gao <[email protected]>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <[email protected]>
Signed-off-by: Leo Duran <[email protected]>
---
MdePkg/Library/PeiIoLibCpuIo/IoLib.c | 261 +++++++++++++++++++++++++++++++++++
1 file changed, 261 insertions(+)
diff --git a/MdePkg/Library/PeiIoLibCpuIo/IoLib.c
b/MdePkg/Library/PeiIoLibCpuIo/IoLib.c
index 1f50a12..e09bec9 100644
--- a/MdePkg/Library/PeiIoLibCpuIo/IoLib.c
+++ b/MdePkg/Library/PeiIoLibCpuIo/IoLib.c
@@ -2,6 +2,8 @@
I/O Library. The implementations are based on EFI_PEI_SERVICE->CpuIo
interface.
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD
License
which accompanies this distribution. The full text of the license may be
found at
@@ -20,6 +22,81 @@
#include <Library/BaseLib.h>
#include <Library/PeiServicesTablePointerLib.h>
+
+/**
+ Reads registers in the EFI CPU I/O space.
+
+ Reads the I/O port specified by Port with registers width specified by Width.
+ The port is read Count times, and the read data is stored in the provided
Buffer.
+
+ This function must guarantee that all I/O read and write operations are
serialized.
+ If such operations are not supported, then ASSERT().
+
+ @param Port The base address of the I/O operation.
+ The caller is responsible for aligning the Address if
required.
+ @param Width The width of the I/O operation.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifoWorker (
+ IN UINTN Port,
+ IN EFI_PEI_CPU_IO_PPI_WIDTH Width,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ CONST EFI_PEI_SERVICES **PeiServices;
+ EFI_PEI_CPU_IO_PPI *CpuIo;
+ EFI_STATUS Status;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ CpuIo = (*PeiServices)->CpuIo;
+ ASSERT (CpuIo != NULL);
+
+ Status = CpuIo->Io.Read (PeiServices, CpuIo, Width, Port, Count, Buffer);
+ ASSERT_EFI_ERROR (Status);
+}
+
+/**
+ Writes registers in the EFI CPU I/O space.
+
+ Writes the I/O port specified by Port with registers width specified by
Width.
+ The port is written Count times, and the write data is retrieved from the
provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
serialized.
+ If such operations are not supported, then ASSERT().
+
+ @param Port The base address of the I/O operation.
+ The caller is responsible for aligning the Address if
required.
+ @param Width The width of the I/O operation.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoWriteFifoWorker (
+ IN UINTN Port,
+ IN EFI_PEI_CPU_IO_PPI_WIDTH Width,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ CONST EFI_PEI_SERVICES **PeiServices;
+ EFI_PEI_CPU_IO_PPI *CpuIo;
+ EFI_STATUS Status;
+
+ PeiServices = GetPeiServicesTablePointer ();
+ CpuIo = (*PeiServices)->CpuIo;
+ ASSERT (CpuIo != NULL);
+
+ Status = CpuIo->Io.Write (PeiServices, CpuIo, Width, Port, Count, Buffer);
+ ASSERT_EFI_ERROR (Status);
+}
+
/**
Reads an 8-bit I/O port.
@@ -297,6 +374,190 @@ IoWrite64 (
}
/**
+ Reads an 8-bit I/O port fifo into a block of memory.
+
+ Reads the 8-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ IoReadFifoWorker (Port, EfiPeiCpuIoWidthFifoUint8, Count, Buffer);
+}
+
+/**
+ Writes a block of memory into an 8-bit I/O port fifo.
+
+ Writes the 8-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo8 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ IoWriteFifoWorker (Port, EfiPeiCpuIoWidthFifoUint8, Count, Buffer);
+}
+
+/**
+ Reads a 16-bit I/O port fifo into a block of memory.
+
+ Reads the 16-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ //
+ // Make sure Port is aligned on a 16-bit boundary.
+ //
+ ASSERT ((Port & 1) == 0);
+ IoReadFifoWorker (Port, EfiPeiCpuIoWidthFifoUint16, Count, Buffer);
+}
+
+/**
+ Writes a block of memory into a 16-bit I/O port fifo.
+
+ Writes the 16-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo16 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ //
+ // Make sure Port is aligned on a 16-bit boundary.
+ //
+ ASSERT ((Port & 1) == 0);
+ IoWriteFifoWorker (Port, EfiPeiCpuIoWidthFifoUint16, Count, Buffer);
+}
+
+/**
+ Reads a 32-bit I/O port fifo into a block of memory.
+
+ Reads the 32-bit I/O fifo port specified by Port.
+ The port is read Count times, and the read data is
+ stored in the provided Buffer.
+
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param Count The number of times to read I/O port.
+ @param Buffer The buffer to store the read data into.
+
+**/
+VOID
+EFIAPI
+IoReadFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ OUT VOID *Buffer
+ )
+{
+ //
+ // Make sure Port is aligned on a 32-bit boundary.
+ //
+ ASSERT ((Port & 3) == 0);
+ IoReadFifoWorker (Port, EfiPeiCpuIoWidthFifoUint32, Count, Buffer);
+}
+
+/**
+ Writes a block of memory into a 32-bit I/O port fifo.
+
+ Writes the 32-bit I/O fifo port specified by Port.
+ The port is written Count times, and the write data is
+ retrieved from the provided Buffer.
+
+ This function must guarantee that all I/O write and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Count The number of times to write I/O port.
+ @param Buffer The buffer to retrieve the write data from.
+
+**/
+VOID
+EFIAPI
+IoWriteFifo32 (
+ IN UINTN Port,
+ IN UINTN Count,
+ IN VOID *Buffer
+ )
+{
+ //
+ // Make sure Port is aligned on a 32-bit boundary.
+ //
+ ASSERT ((Port & 3) == 0);
+ IoWriteFifoWorker (Port, EfiPeiCpuIoWidthFifoUint32, Count, Buffer);
+}
+
+/**
Reads an 8-bit MMIO register.
Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
--
1.9.1
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