On 31 January 2017 at 11:44, Leif Lindholm <[email protected]> wrote:
> On Tue, Jan 31, 2017 at 09:48:11AM +0000, Ryan Harkin wrote:
>> On 26 January 2017 at 14:36, Leif Lindholm <[email protected]> wrote:
>> > On Fri, Jan 20, 2017 at 05:10:45PM +0530, Bhupesh Sharma wrote:
>> >> ARM TZASC-380 IP provides a mechanism to split memory regions being
>> >> protected via it into eight equal-sized sub-regions. A bit-setting
>> >> allows the corresponding subregion to be disabled.
>> >>
>> >> Several NXP/FSL SoCs support the TZASC-380 IP block and allow
>> >> the DDR connected via the TZASC to be partitioned into regions
>> >> having different security settings and also allow subregions
>> >> to be disabled.
>> >>
>> >> This patch enables this support and can be used for SoCs which
>> >> support such a partition of DDR regions.
>> >>
>> >> Details of the 'subregion_disable' register can be viewed here:
>> >> http://infocenter.arm.com/help/topic/com.arm.doc.ddi0431c/CHDIGDCI.html
>> >>
>> >> Cc: Leif Lindholm <[email protected]>
>> >> Cc: Ard Biesheuvel <[email protected]>
>> >> Contributed-under: TianoCore Contribution Agreement 1.0
>> >> Signed-off-by: Bhupesh Sharma <[email protected]>
>> >> [[email protected] : Added my gmail ID as the NXP one is no longer 
>> >> valid]
>> >> Signed-off-by: Bhupesh Sharma <[email protected]>
>> >
>> > Thanks for the cleanup.
>> > I may actually delete that CTA9x4 lib once your platform gets in...
>> >
>> Probably a good idea. I suspect it's not used or tested any more,
>> unless QEMU is using it?
>
> It's unused.

Good. Maybe it's u-boot that uses CTA9 for qemu testing...


> And if we do ever resurrect the CTA9 port, it'll be using
> ARM Trusted Firmware,

Gulp!


> so this code will still be irrelevant.
>
Exterminate!

> /
>     Leif
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