Here are the compiler flags [BuildOptions] MSFT:DEBUG_*_*_CC_FLAGS = /Od /FAsc /GL- MSFT:RELEASE_*_*_CC_FLAGS = /FAsc /D MDEPKG_NDEBUG MSFT:RELEASE_*_*_DLINK_FLAGS = /BASE:0x10000 /ALIGN:4096 /FILEALIGN:4096
________________________________ From: Amit kumar <akami...@hotmail.com> Sent: Thursday, May 4, 2017 5:48:11 PM To: Andrew Fish Cc: Mike Kinney; edk2-devel@lists.01.org Subject: Re: [edk2] Accessing AVX/AVX2 instruction in UEFI. Yes am aligning the data at 32 byte boundary while allocating memory in both environments. in windows using _alligned_malloc(size,32); in UEFI Offset = (UINTN)src & 0xFF; src = (CHAR8 *)((UINTN) src - Offset + 0x20); Thanks Amit ________________________________ From: af...@apple.com <af...@apple.com> on behalf of Andrew Fish <af...@apple.com> Sent: Thursday, May 4, 2017 5:02:55 PM To: Amit kumar Cc: Mike Kinney; edk2-devel@lists.01.org Subject: Re: [edk2] Accessing AVX/AVX2 instruction in UEFI. > On May 4, 2017, at 4:13 AM, Amit kumar <akami...@hotmail.com> wrote: > > Hi, > > > Even after using AVX2 instruction my code shown no performance improvement in > UEFI although there is substantial improvement when i run the similar code in > windows . > > Am i missing something ? > Is the data aligned the same in both environments? Thanks, Andrew Fish > Using MSVC compiler and the codes written in ASM. > > Thanks And Regards > > Amit > > ________________________________ > From: edk2-devel <edk2-devel-boun...@lists.01.org> on behalf of Amit kumar > <akami...@hotmail.com> > Sent: Wednesday, May 3, 2017 11:18:39 AM > To: Kinney, Michael D; Andrew Fish > Cc: edk2-devel@lists.01.org > Subject: Re: [edk2] Accessing AVX/AVX2 instruction in UEFI. > > Thank you Michael and Andrew > > > Regards > > Amit > > ________________________________ > From: Kinney, Michael D <michael.d.kin...@intel.com> > Sent: Tuesday, May 2, 2017 10:33:45 PM > To: Andrew Fish; Amit kumar; Kinney, Michael D > Cc: edk2-devel@lists.01.org > Subject: RE: [edk2] Accessing AVX/AVX2 instruction in UEFI. > > Amit, > > The information from Andrew is correct. > > The document that covers this topic is the > Intel(r) 64 and IA-32 Architectures Software Developer Manuals > > https://software.intel.com/en-us/articles/intel-sdm > > Volume 1, Section 13.5.3 describes the AVX State. There are > More details about detecting and enabling different AVX features > in that document. > > If the CPU supports AVX, then the basic assembly instructions > required to use AVX instructions are the following that sets > bits 0, 1, 2 of XCR0. > > mov rcx, 0 > xgetbv > or rax, 0007h > xsetbv > > One additional item you need to be aware of is that UEFI firmware only > saves/Restores CPU registers required for the UEFI ABI calling convention > when a timer interrupt or exception is processed. > > This means CPU state such as the YMM registers are not saved/restored > across an interrupt and may be modified if code in interrupt context > also uses YMM registers. > > When you enable the use of extended registers, interrupts should be > saved/disabled and restored around the extended register usage. > > You can use the following functions from MdePkg BaseLib to do this > > /** > Disables CPU interrupts and returns the interrupt state prior to the disable > operation. > > @retval TRUE CPU interrupts were enabled on entry to this call. > @retval FALSE CPU interrupts were disabled on entry to this call. > > **/ > BOOLEAN > EFIAPI > SaveAndDisableInterrupts ( > VOID > ); > > /** > Set the current CPU interrupt state. > > Sets the current CPU interrupt state to the state specified by > InterruptState. If InterruptState is TRUE, then interrupts are enabled. If > InterruptState is FALSE, then interrupts are disabled. InterruptState is > returned. > > @param InterruptState TRUE if interrupts should enabled. FALSE if > interrupts should be disabled. > > @return InterruptState > > **/ > BOOLEAN > EFIAPI > SetInterruptState ( > IN BOOLEAN InterruptState > ); > > Algorithm: > ============ > { > BOOLEAN InterruptState; > > InterruptState = SaveAndDisableInterrupts(); > > // Enable use of AVX/AVX2 instructions > > // Use AVX/AVX2 instructions > > SetInterruptState (InterruptState); > } > > Best regards, > > Mike > >> -----Original Message----- >> From: edk2-devel [mailto:edk2-devel-boun...@lists.01.org] On Behalf Of >> Andrew Fish >> Sent: Tuesday, May 2, 2017 8:12 AM >> To: Amit kumar <akami...@hotmail.com> >> Cc: edk2-devel@lists.01.org >> Subject: Re: [edk2] Accessing AVX/AVX2 instruction in UEFI. >> >> >>> On May 2, 2017, at 6:57 AM, Amit kumar <akami...@hotmail.com> wrote: >>> >>> Hi, >>> >>> Am trying to optimize an application using AVX/AVX2, but my code hangs >>> while trying >> to access YMM registers. >>> The instruction where my code hangs is : >>> >>> >>> vmovups ymm0, YMMWORD PTR [rax] >>> >>> >>> I have verified the cpuid in OS and it supports AVX and AVX2 instruction. >>> Processor >> i7 6th gen. >>> Can somebody help me out here ? Is there a way to enable YMM registers ? >>> >> >> Amit, >> >> I think these instructions will generate an illegal instruction fault until >> you enable >> AVX. You need to check the Cpu ID bits in your code, then write BIT18 of >> CR4. After >> that XGETBV/XSETBV instructions are enabled and you can or in the lower 2 >> bits of >> XCR0. This basic operation is in the Intel Docs, it is just hard to find. >> Usually the >> OS has done this for the programmer and all the code needs to do is check >> the CPU ID. >> >> Thanks, >> >> Andrew Fish >> >>> >>> Thanks And Regards >>> Amit Kumar >>> >>> _______________________________________________ >>> edk2-devel mailing list >>> edk2-devel@lists.01.org >>> https://lists.01.org/mailman/listinfo/edk2-devel >> >> _______________________________________________ >> edk2-devel mailing list >> edk2-devel@lists.01.org >> https://lists.01.org/mailman/listinfo/edk2-devel > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
