> -----Original Message----- > From: Leif Lindholm [mailto:leif.lindh...@linaro.org] > Sent: 06 June 2017 11:52 > To: Scott Telford <stelf...@cadence.com> > Cc: edk2-de...@ml01.01.org; ard.biesheu...@linaro.org; > graeme.greg...@linaro.org; af...@apple.com; michael.d.kin...@intel.com > Subject: Re: [staging/cadence-aarch64 PATCH v2 4/6] CadencePkg: Add SEC > phase implementation for Cadence CSP platform. > > On Mon, Jun 05, 2017 at 11:50:26AM +0100, Scott Telford wrote: > > Add SEC phase implementation for Cadence CSP platform configured with > > a single Cortex-A53 processor and GIC-500.
> Secondly, is there a strong reason why ArmCortexA5xLib cannot be used > as is, rather than copied across? ArmCpuLib was deleted in commit cffa7925a293d991957bc47865eac25516b59e63, hence the need to merge the required A5x routines into this code. > Thirdly, it would be nice if the commit message described explicitly > where this code came from. Will do. Regards, Scott. _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
