On 27 February 2018 at 13:47, Ard Biesheuvel <[email protected]> wrote: > The Designware PCIe IP in the SynQuacer SoC needs a little help to > appear sane to the OS. Not only does it lack a true root port, and > therefore does not perform any filtering whatsoever of type 0 config > TLPs that are not intended for the link peer, it also has trouble > issuing 64-bit wide MMIO accesses, which are often used on MMIO BARs > with memory semantics (e.g., frame buffers). > > So let's create a stage 2 mapping covering the entire physical address > space, and remap some ECAM regions and demote write combine attributes > to device/strongly ordered. This is not a water tight fix, but it does > work around the issues in the majority of cases. > > (Note that the ECAM remapping can also be addressed in the SMMU mapping > of the PCIe IP exposed to the CPU, but this is currently under > development, and it does not hurt to have it in two places) > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Ard Biesheuvel <[email protected]> > --- > This is a followup to/replacement for '[RFC PATCH edk2-non-osi] > Platform/DeveloperBox: add prebuilt binary containing stage 2 page tables' > > Platform/Socionext/DeveloperBox/DeveloperBox.dsc | 1 + > Platform/Socionext/DeveloperBox/DeveloperBox.fdf | 5 +- > Silicon/Socionext/SynQuacer/Stage2Tables/GNUmakefile | 23 +++++ > Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.S | 88 > ++++++++++++++++++++ > Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.inf | 32 +++++++ > 5 files changed, 148 insertions(+), 1 deletion(-) > ... > diff --git a/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.inf > b/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.inf > new file mode 100644 > index 000000000000..9bec659af444 > --- /dev/null > +++ b/Silicon/Socionext/SynQuacer/Stage2Tables/Stage2Tables.inf > @@ -0,0 +1,32 @@ > +## @file > +# > +# Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR> > +# > +# This program and the accompanying materials > +# are licensed and made available under the terms and conditions of the BSD > License > +# which accompanies this distribution. The full text of the license may be > found at > +# http://opensource.org/licenses/bsd-license.php > +# > +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, > +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR > IMPLIED. > +# > +## > + > +[Defines] > + INF_VERSION = 0x0001001A > + BASE_NAME = Stage2Tables > + FILE_GUID = e11cbca5-8f82-41a7-8441-02b48acc13a7 > + MODULE_TYPE = USER_DEFINED > + VERSION_STRING = 1.0 > + CUSTOM_MAKEFILE = GCC|GNUmakefile > + > +[Sources] > + Stage2Tables.S > + > +[Packages] > + MdePkg/MdePkg.dec > + Silicon/Socionext/SynQuacer/SynQuacer.dec > + > +[BuildOptions] > + *_*_*_OBJCOPY_PATH == objcopy > + *_*_*_OBJCOPY_FLAGS == -I elf64-little -O binary -j .rodata
I can improve this and fix Clang at the same time by adding *_*_*_ASM_FLAGS == -nostdlib -Wl,-e,0x81f8000,--section-start=.rodata=0x81f8000 *_CLANG35_*_ASM_FLAGS = -no-integrated-as *_CLANG38_*_ASM_FLAGS = -no-integrated-as (and remove the linker arguments from the Makefile) _______________________________________________ edk2-devel mailing list [email protected] https://lists.01.org/mailman/listinfo/edk2-devel
