According to IA manual: "Before setting this bit (MSR_IA32_MISC_ENABLE[22]) , BIOS must execute the CPUID.0H and examine the maximum value returned in EAX[7:0]. If the maximum value is greater than 2, this bit is supported."
We need to fix our current detection logic to compare against 2. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ruiyu Ni <[email protected]> Cc: Eric Dong <[email protected]> Cc: Ming Shao <[email protected]> --- UefiCpuPkg/Library/CpuCommonFeaturesLib/LimitCpuIdMaxval.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/LimitCpuIdMaxval.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/LimitCpuIdMaxval.c index 40cc9d5fe0..3d41efe9e9 100644 --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/LimitCpuIdMaxval.c +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/LimitCpuIdMaxval.c @@ -1,7 +1,7 @@ /** @file LimitCpuidMaxval Feature. - Copyright (c) 2017, Intel Corporation. All rights reserved.<BR> + Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.<BR> This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full text of the license may be found at @@ -41,7 +41,7 @@ LimitCpuidMaxvalSupport ( UINT32 Eax; AsmCpuid (CPUID_SIGNATURE, &Eax, NULL, NULL, NULL); - return (Eax > 3); + return (Eax > 2); } /** -- 2.16.1.windows.1 _______________________________________________ edk2-devel mailing list [email protected] https://lists.01.org/mailman/listinfo/edk2-devel
