On 6 June 2018 at 18:07, Kinney, Michael D <[email protected]> wrote: > Ard, > > Thanks for adding the note. I was thinking that this could be done > just before ResetSystem(). It could also be done in SEC phase. > > Since capsules are just one use of warm reset, would it make more sense > to flush all the caches in either warm reset of SEC instead of just > the ranges used by capsules. >
The ARM architecture does not provide for that, unfortunately. The only architected cache maintenance that guarantees that dirty cachelines make it all the way to memory (point of coherency or PoC in ARM parlance) is to clean the caches by virtual address, and cleaning all of memory by VA is intractible. The architecture does provide clean by set/way operations, but those operate on each cache level individually, and only on architected cache levels. (The architecture permits so-called system caches that whose set/way maintenance is implementation defined, and only maintenance by VA is guaranteed to clean the data to main memory) _______________________________________________ edk2-devel mailing list [email protected] https://lists.01.org/mailman/listinfo/edk2-devel
