On 12 July 2018 at 09:39, Marcin Wojtas <[email protected]> wrote:
> ICU (Interrupt Consolidation Unit) is a mechanism,
> that allows to send a message-based interrupts from the
> CP110 unit (South Bridge) to the Application Processor
> hardware block. After dispatching the interrupts in the
> GIC are generated.
>
> This patch adds a basic version of the library, that
> allows to configure a static mapping between CP110
> interfaces and GIC. It is required for the cases, where
> the OS does not support the ICU controller on its own
> (e.g. ACPI boot).
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <[email protected]>
> ---
> Silicon/Marvell/Marvell.dec | 1 +
> Silicon/Marvell/Include/Library/ArmadaIcuLib.h | 45 ++++++++++++++++++++
> 2 files changed, 46 insertions(+)
> create mode 100644 Silicon/Marvell/Include/Library/ArmadaIcuLib.h
>
> diff --git a/Silicon/Marvell/Marvell.dec b/Silicon/Marvell/Marvell.dec
> index 4def897..616624e 100644
> --- a/Silicon/Marvell/Marvell.dec
> +++ b/Silicon/Marvell/Marvell.dec
> @@ -61,6 +61,7 @@
>
> [LibraryClasses]
> ArmadaBoardDescLib|Include/Library/ArmadaBoardDescLib.h
> + ArmadaIcuLib|Include/Library/ArmadaIcuLib.h
> ArmadaSoCDescLib|Include/Library/ArmadaSoCDescLib.h
> SampleAtResetLib|Include/Library/SampleAtResetLib.h
>
> diff --git a/Silicon/Marvell/Include/Library/ArmadaIcuLib.h
> b/Silicon/Marvell/Include/Library/ArmadaIcuLib.h
> new file mode 100644
> index 0000000..9b68934
> --- /dev/null
> +++ b/Silicon/Marvell/Include/Library/ArmadaIcuLib.h
> @@ -0,0 +1,45 @@
> +/**
> +*
> +* Copyright (C) 2018, Marvell International Ltd. and its affiliates
> +*
> +* This program and the accompanying materials are licensed and made
> available
> +* under the terms and conditions of the BSD License which accompanies this
> +* distribution. The full text of the license may be found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
> IMPLIED.
> +*
> +**/
> +#ifndef __ARMADA_ICU_LIB_H__
> +#define __ARMADA_ICU_LIB_H__
> +
> +typedef enum {
> + Level = 0,
> + Edge = 1
Could we have more discriminating identifiers here please?
IcuIrqTypeLevel and IcuIrqTypeEdge perhaps?
> +} ICU_IRQ_TYPE;
> +
> +typedef struct {
> + UINTN IcuId;
> + UINTN SpiId;
> + ICU_IRQ_TYPE IrqType;
> +} ICU_IRQ;
> +
> +typedef struct {
> + const ICU_IRQ *Map;
> + UINTN Size;
> +} ICU_CONFIG_ENTRY;
> +
> +typedef struct {
> + ICU_CONFIG_ENTRY NonSecure;
> + ICU_CONFIG_ENTRY Sei;
> + ICU_CONFIG_ENTRY Rei;
> +} ICU_CONFIG;
> +
> +EFI_STATUS
> +EFIAPI
> +ArmadaIcuInitialize (
> + VOID
> + );
> +
> +#endif /* __ARMADA_ICU_LIB_H__ */
> --
> 2.7.4
>
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