On 07/12/18 12:49, Eric Dong wrote:
> Read uCode from memory has better performance than from flash.
> But it needs extra effort to let BSP copy uCode from flash to
> memory. Also BSP already enable cache in SEC phase, so it use
> less time to relocate uCode from flash to memory. After
> verification, if system has more than one processor, it will
> reduce some time if load uCode from memory.
> 
> This change enable this optimization.
> 
> Cc: Laszlo Ersek <[email protected]>
> Cc: Ruiyu Ni <[email protected]>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Eric Dong <[email protected]>
> ---
>  UefiCpuPkg/Library/MpInitLib/MpLib.c | 34 +++++++++++++++++++++++++++++++++-
>  1 file changed, 33 insertions(+), 1 deletion(-)
> 
> diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c 
> b/UefiCpuPkg/Library/MpInitLib/MpLib.c
> index 108eea0a6f..c3cd6d7d51 100644
> --- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
> +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
> @@ -1520,6 +1520,7 @@ MpInitLibInitialize (
>    UINTN                    ApResetVectorSize;
>    UINTN                    BackupBufferAddr;
>    UINTN                    ApIdtBase;
> +  VOID                     *MicrocodePatchInRam;
>  
>    OldCpuMpData = GetCpuMpDataFromGuidedHob ();
>    if (OldCpuMpData == NULL) {
> @@ -1587,8 +1588,39 @@ MpInitLibInitialize (
>    CpuMpData->SwitchBspFlag    = FALSE;
>    CpuMpData->CpuData          = (CPU_AP_DATA *) (CpuMpData + 1);
>    CpuMpData->CpuInfoInHob     = (UINT64) (UINTN) (CpuMpData->CpuData + 
> MaxLogicalProcessorNumber);
> -  CpuMpData->MicrocodePatchAddress    = PcdGet64 
> (PcdCpuMicrocodePatchAddress);
>    CpuMpData->MicrocodePatchRegionSize = PcdGet64 
> (PcdCpuMicrocodePatchRegionSize);
> +  //
> +  // If platform has more than one CPU, relocate microcode to memory to 
> reduce
> +  // loading microcode time.
> +  //
> +  MicrocodePatchInRam = NULL;
> +  if (MaxLogicalProcessorNumber > 1) {
> +    MicrocodePatchInRam = AllocatePages (
> +                            EFI_SIZE_TO_PAGES (
> +                              (UINTN)CpuMpData->MicrocodePatchRegionSize
> +                              )
> +                            );
> +    ASSERT (MicrocodePatchInRam != NULL);
> +  }
> +  if (MicrocodePatchInRam == NULL) {
> +    //
> +    // there is only one processor, or no microcode patch is available, or
> +    // memory allocation failed
> +    //
> +    CpuMpData->MicrocodePatchAddress = PcdGet64 
> (PcdCpuMicrocodePatchAddress);
> +  } else {
> +    //
> +    // there are multiple processors, and a microcode patch is available, and
> +    // memory allocation succeeded
> +    //
> +    CopyMem (
> +      MicrocodePatchInRam,
> +      (VOID *)(UINTN)PcdGet64 (PcdCpuMicrocodePatchAddress),
> +      (UINTN)CpuMpData->MicrocodePatchRegionSize
> +      );
> +    CpuMpData->MicrocodePatchAddress = (UINTN)MicrocodePatchInRam;
> +  }
> +
>    InitializeSpinLock(&CpuMpData->MpLock);
>  
>    //
> 

Reviewed-by: Laszlo Ersek <[email protected]>
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