V2 changes include:
1. Use X in ReservedX fields from totally new value if MSR structure definition
changed.
For example, if in current structure, the max reserved variable is
Reserved2, in new
definition, reserved variable is begin with Reserved3.
V1 Changes includes:
1. Change fields which is reserved in old version: MSR_IA32_RTIT_CTL_REGISTER
Cc: Michael D Kinney <michael.d.kin...@intel.com>
Cc: Ruiyu Ni <ruiyu...@intel.com>
Cc: Laszlo Ersek <ler...@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.d...@intel.com>
---
UefiCpuPkg/Include/Register/ArchitecturalMsr.h | 22 ++++++++++++++++------
1 file changed, 16 insertions(+), 6 deletions(-)
diff --git a/UefiCpuPkg/Include/Register/ArchitecturalMsr.h
b/UefiCpuPkg/Include/Register/ArchitecturalMsr.h
index b467ffaf26..3be0c31c68 100644
--- a/UefiCpuPkg/Include/Register/ArchitecturalMsr.h
+++ b/UefiCpuPkg/Include/Register/ArchitecturalMsr.h
@@ -4647,7 +4647,14 @@ typedef union {
/// [Bit 3] User.
///
UINT32 User:1;
- UINT32 Reserved1:2;
+ ///
+ /// [Bit 4] PwrEvtEn.
+ ///
+ UINT32 PwrEvtEn:1;
+ ///
+ /// [Bit 5] FUPonPTW.
+ ///
+ UINT32 FUPonPTW:1;
///
/// [Bit 6] FabricEn. If (CPUID.(EAX=07H, ECX=0):ECX[3] = 1).
///
@@ -4672,7 +4679,10 @@ typedef union {
/// [Bit 11] DisRETC.
///
UINT32 DisRETC:1;
- UINT32 Reserved2:1;
+ ///
+ /// [Bit 12] PTWEn.
+ ///
+ UINT32 PTWEn:1;
///
/// [Bit 13] BranchEn.
///
@@ -4681,17 +4691,17 @@ typedef union {
/// [Bits 17:14] MTCFreq. If (CPUID.(EAX=07H, ECX=0):EBX[3] = 1).
///
UINT32 MTCFreq:4;
- UINT32 Reserved3:1;
+ UINT32 Reserved7:1;
///
/// [Bits 22:19] CYCThresh. If (CPUID.(EAX=07H, ECX=0):EBX[1] = 1).
///
UINT32 CYCThresh:4;
- UINT32 Reserved4:1;
+ UINT32 Reserved8:1;
///
/// [Bits 27:24] PSBFreq. If (CPUID.(EAX=07H, ECX=0):EBX[1] = 1).
///
UINT32 PSBFreq:4;
- UINT32 Reserved5:4;
+ UINT32 Reserved9:4;
///
/// [Bits 35:32] ADDR0_CFG. If (CPUID.(EAX=07H, ECX=1):EAX[2:0] > 0).
///
@@ -4708,7 +4718,7 @@ typedef union {
/// [Bits 47:44] ADDR3_CFG. If (CPUID.(EAX=07H, ECX=1):EAX[2:0] > 3).
///
UINT32 ADDR3_CFG:4;
- UINT32 Reserved6:16;
+ UINT32 Reserved10:16;
} Bits;
///
/// All bit fields as a 64-bit value
--
2.15.0.windows.1
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