(This patch is identical to the X64 half of the last one, except for the InternalSyncCompareExchange32() -> InternalSyncCompareExchange64() and "cmpxchgl" -> "cmpxchgq" replacements.)
The CMPXCHG instruction has the following operands: - AX (implicit, CompareValue): input and output - destination operand (*Value): input and output - source operand (ExchangeValue): input The X64 version of InternalSyncCompareExchange64() attempts to mark both CompareValue and (*Value) as input/output, but it doesn't use the appropriate constraints for either operand. Fix these issues. Furthermore, prefer the short "+" constraint for I/O operands over the <output-operand-number> constraint that can be applied to the input instances of I/O operands. Cc: Liming Gao <[email protected]> Cc: Michael D Kinney <[email protected]> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1208 Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Laszlo Ersek <[email protected]> --- MdePkg/Library/BaseSynchronizationLib/X64/GccInline.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/MdePkg/Library/BaseSynchronizationLib/X64/GccInline.c b/MdePkg/Library/BaseSynchronizationLib/X64/GccInline.c index a85cf0265c8b..edb904c00704 100644 --- a/MdePkg/Library/BaseSynchronizationLib/X64/GccInline.c +++ b/MdePkg/Library/BaseSynchronizationLib/X64/GccInline.c @@ -194,12 +194,10 @@ InternalSyncCompareExchange64 ( { __asm__ __volatile__ ( "lock \n\t" - "cmpxchgq %3, %1 \n\t" - : "=a" (CompareValue), // %0 - "=m" (*Value) // %1 - : "a" (CompareValue), // %2 - "r" (ExchangeValue), // %3 - "m" (*Value) // %4 + "cmpxchgq %2, %1 \n\t" + : "+a" (CompareValue), // %0 + "+m" (*Value) // %1 + : "r" (ExchangeValue) // %2 : "memory", "cc" ); -- 2.14.1.3.gb7cf6e02401b _______________________________________________ edk2-devel mailing list [email protected] https://lists.01.org/mailman/listinfo/edk2-devel
