Use intermediate (UINTN) casts when casting pointers to UINT64. This is needed to be able to build this code for 32-bit architectures such as ARM or IA32.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <[email protected]> --- IntelUndiPkg/XGigUndiDxe/Dma.c | 8 ++++---- IntelUndiPkg/XGigUndiDxe/DriverDiagnostics.c | 4 ++-- IntelUndiPkg/XGigUndiDxe/Init.c | 6 +++--- IntelUndiPkg/XGigUndiDxe/Xgbe.c | 8 ++++---- IntelUndiPkg/XGigUndiDxe/Xgbe.h | 4 ++-- 5 files changed, 15 insertions(+), 15 deletions(-) diff --git a/IntelUndiPkg/XGigUndiDxe/Dma.c b/IntelUndiPkg/XGigUndiDxe/Dma.c index c8588df96ef5..79a5cefe9f41 100644 --- a/IntelUndiPkg/XGigUndiDxe/Dma.c +++ b/IntelUndiPkg/XGigUndiDxe/Dma.c @@ -127,7 +127,7 @@ FREE_BUF_ON_ERROR: PciIo->FreeBuffer ( PciIo, BytesToPages (DmaMapping->Size), - (VOID *) DmaMapping->UnmappedAddress + (VOID *)(UINTN)DmaMapping->UnmappedAddress ); DmaMapping->Size = 0; DmaMapping->UnmappedAddress = 0; @@ -173,7 +173,7 @@ UndiDmaFreeCommonBuffer ( PciIo->FreeBuffer ( PciIo, BytesToPages (DmaMapping->Size), - (VOID *) DmaMapping->UnmappedAddress + (VOID *)(UINTN)DmaMapping->UnmappedAddress ); DmaMapping->UnmappedAddress = 0; @@ -209,7 +209,7 @@ UndiDmaMapCommonBuffer ( return PciIo->Map ( PciIo, EfiPciIoOperationBusMasterCommonBuffer, - (VOID *) DmaMapping->UnmappedAddress, + (VOID *)(UINTN)DmaMapping->UnmappedAddress, &DmaMapping->Size, &DmaMapping->PhysicalAddress, &DmaMapping->Mapping @@ -243,7 +243,7 @@ UndiDmaMapMemoryRead ( return PciIo->Map ( PciIo, EfiPciIoOperationBusMasterRead, - (VOID *) DmaMapping->UnmappedAddress, + (VOID *)(UINTN)DmaMapping->UnmappedAddress, &DmaMapping->Size, &DmaMapping->PhysicalAddress, &DmaMapping->Mapping diff --git a/IntelUndiPkg/XGigUndiDxe/DriverDiagnostics.c b/IntelUndiPkg/XGigUndiDxe/DriverDiagnostics.c index 66dc67a5400e..2f9c66771910 100644 --- a/IntelUndiPkg/XGigUndiDxe/DriverDiagnostics.c +++ b/IntelUndiPkg/XGigUndiDxe/DriverDiagnostics.c @@ -119,11 +119,11 @@ XgbeUndiRunPhyLoopback ( DEBUGPRINT (DIAG, ("CpbReceive.BufferAddr allocated at %x\n", (UINTN) CpbReceive.BufferAddr)); while (j < PHY_LOOPBACK_ITERATIONS) { - ZeroMem ((VOID *) CpbReceive.BufferAddr, RX_BUFFER_SIZE); + ZeroMem ((VOID *)(UINTN)CpbReceive.BufferAddr, RX_BUFFER_SIZE); Status = XgbeTransmit ( XgbeAdapter, - (UINT64) &PxeCpbTransmit, + (UINT64)(UINTN)&PxeCpbTransmit, PXE_OPFLAGS_TRANSMIT_WHOLE ); diff --git a/IntelUndiPkg/XGigUndiDxe/Init.c b/IntelUndiPkg/XGigUndiDxe/Init.c index 03e3942a1944..c112db667148 100644 --- a/IntelUndiPkg/XGigUndiDxe/Init.c +++ b/IntelUndiPkg/XGigUndiDxe/Init.c @@ -260,7 +260,7 @@ InitUndiPxeStructInit ( PXE_ROMID_IMP_TX_COMPLETE_INT_SUPPORTED | PXE_ROMID_IMP_PACKET_RX_INT_SUPPORTED; - PxePtr->EntryPoint = (UINT64) UndiApiEntry; + PxePtr->EntryPoint = (UINT64)(UINTN)UndiApiEntry; PxePtr->MinorVer = PXE_ROMID_MINORVER_31; PxePtr->reserved2[0] = 0; @@ -1099,7 +1099,7 @@ InitUndiCallbackFunctions ( NicInfo->MapMem = (VOID *) 0; NicInfo->UnMapMem = (VOID *) 0; NicInfo->SyncMem = (VOID *) 0; - NicInfo->UniqueId = (UINT64) NicInfo; + NicInfo->UniqueId = (UINT64)(UINTN)NicInfo; NicInfo->VersionFlag = 0x31; } @@ -1284,7 +1284,7 @@ InitNiiProtocol ( EFI_STATUS Status; - NiiProtocol31->Id = (UINT64) (mIxgbePxe31); + NiiProtocol31->Id = (UINT64)(UINTN)(mIxgbePxe31); // IFcnt should be equal to the total number of physical ports - 1 NiiProtocol31->IfNum = mIxgbePxe31->IFcnt; diff --git a/IntelUndiPkg/XGigUndiDxe/Xgbe.c b/IntelUndiPkg/XGigUndiDxe/Xgbe.c index 003c3b9065ec..6769f2dc72ab 100644 --- a/IntelUndiPkg/XGigUndiDxe/Xgbe.c +++ b/IntelUndiPkg/XGigUndiDxe/Xgbe.c @@ -1237,7 +1237,7 @@ XgbeTxRxConfigure ( ZeroMem (XgbeAdapter->TxBufferMappings, sizeof (XgbeAdapter->TxBufferMappings)); - RxBuffer = (LOCAL_RX_BUFFER *) XgbeAdapter->RxBufferMapping.PhysicalAddress; + RxBuffer = (LOCAL_RX_BUFFER *)(UINTN)XgbeAdapter->RxBufferMapping.PhysicalAddress; DEBUGPRINT ( XGBE, ("Local Rx Buffer %X size %X\n", @@ -1407,17 +1407,17 @@ XgbeInitialize ( TempBar = NULL; ZeroMem ( - (VOID *) XgbeAdapter->RxRing.UnmappedAddress, + (VOID *)(UINTN)XgbeAdapter->RxRing.UnmappedAddress, RX_RING_SIZE ); ZeroMem ( - (VOID *) XgbeAdapter->TxRing.UnmappedAddress, + (VOID *)(UINTN)XgbeAdapter->TxRing.UnmappedAddress, TX_RING_SIZE ); ZeroMem ( - (VOID *) XgbeAdapter->RxBufferMapping.UnmappedAddress, + (VOID *)(UINTN)XgbeAdapter->RxBufferMapping.UnmappedAddress, RX_BUFFERS_SIZE ); diff --git a/IntelUndiPkg/XGigUndiDxe/Xgbe.h b/IntelUndiPkg/XGigUndiDxe/Xgbe.h index 4472cfb4fa31..2a904de5bf2f 100644 --- a/IntelUndiPkg/XGigUndiDxe/Xgbe.h +++ b/IntelUndiPkg/XGigUndiDxe/Xgbe.h @@ -221,7 +221,7 @@ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. @return Descriptor retrieved **/ #define XGBE_RX_DESC(R, i) \ - (&(((struct ixgbe_legacy_rx_desc *) ((R)->UnmappedAddress))[i])) + (&(((struct ixgbe_legacy_rx_desc *)(UINTN)((R)->UnmappedAddress))[i])) /** Retrieves TX descriptor from TX ring structure @@ -231,7 +231,7 @@ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. @return Descriptor retrieved **/ #define XGBE_TX_DESC(R, i) \ - (&(((struct ixgbe_legacy_tx_desc *) ((R)->UnmappedAddress))[i])) + (&(((struct ixgbe_legacy_tx_desc *)(UINTN)((R)->UnmappedAddress))[i])) /** Retrieves UNDI_PRIVATE_DATA structure using NII Protocol 3.1 instance -- 2.17.1 _______________________________________________ edk2-devel mailing list [email protected] https://lists.01.org/mailman/listinfo/edk2-devel
