On 11/15/18 13:37, Ard Biesheuvel wrote:
> On Wed, 14 Nov 2018 at 14:11, Laszlo Ersek <[email protected]> wrote:
>>
>> On 11/14/18 21:00, Leif Lindholm wrote:
>>> On Wed, Nov 14, 2018 at 11:27:24AM -0800, Ard Biesheuvel wrote:
>>>> Fix a typo in the 32-bit ARM version of the GICv3 driver, which uses
>>>> the wrong system register encoding to access ICC_IAR1, and attempted
>>>> to access ICC_IAR0 instead. This results in boot time hangs both
>>>> under QEMU emulation and on real hardware.
>>>>
>>>> Contributed-under: TianoCore Contribution Agreement 1.1
>>>> Signed-off-by: Ard Biesheuvel <[email protected]>
>>>
>>> Reviewed-by: Leif Lindholm <[email protected]>
>>>
>>> I would say given how long we've gone without finding this,
>>
>> Right, that makes me curious -- what has changed now? What exposed this bug?
>>
> 
> I was regression testing a EFI workaround I put in the kernel for
> GICv3, which was apparently the first time anyone tried running
> EDK2/ARM on a GICv3 system (which is one of the reasons I wanted to
> get you one of the Socionext SynQuacer boards: it has a GICv3 with
> GICv2 compatibility and support for 32-bit guests, but sadly, we still
> don't have any with fixed silicon)
> 

Thanks!
Laszlo
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