Add a helper function that returns the maximum physical address space size as supported by the current CPU.
Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <[email protected]> --- ArmPkg/Include/Library/ArmLib.h | 6 ++++++ ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S | 17 +++++++++++++++++ ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S | 8 ++++++++ ArmPkg/Library/ArmLib/Arm/ArmLibSupport.asm | 8 ++++++++ 4 files changed, 39 insertions(+) diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h index ffda50e9d767..9a804c15fdb6 100644 --- a/ArmPkg/Include/Library/ArmLib.h +++ b/ArmPkg/Include/Library/ArmLib.h @@ -733,4 +733,10 @@ ArmWriteCntvOff ( UINT64 Val ); +UINTN +EFIAPI +ArmGetPhysicalAddressBits ( + VOID + ); + #endif // __ARM_LIB__ diff --git a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S index 1ef2f61f5979..b7173e00b039 100644 --- a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S +++ b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S @@ -196,4 +196,21 @@ ASM_FUNC(ArmWriteSctlr) 3:msr sctlr_el3, x0 4:ret +ASM_FUNC(ArmGetPhysicalAddressBits) + mrs x0, id_aa64mmfr0_el1 + adr x1, .LPARanges + and x0, x0, #0xf + ldrb w0, [x1, x0] + ret + +// +// Bits 0..3 of the AA64MFR0_EL1 system register encode the size of the +// physical address space support on this CPU: +// 0 == 32 bits, 1 == 36 bits, etc etc +// 7 and up are reserved +// +.LPARanges: + .byte 32, 36, 40, 42, 44, 48, 52, 0 + .byte 0, 0, 0, 0, 0, 0, 0, 0 + ASM_FUNCTION_REMOVE_IF_UNREFERENCED diff --git a/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S b/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S index f2a517671f0a..0e9f9d0453e4 100644 --- a/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S +++ b/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S @@ -165,4 +165,12 @@ ASM_FUNC(ArmWriteCpuActlr) isb bx lr +ASM_FUNC (ArmGetPhysicalAddressBits) + mrc p15, 0, r0, c0, c1, 4 // MMFR0 + and r0, r0, #0xf // VMSA [3:0] + cmp r0, #5 // >= 5 implies LPAE support + movlt r0, #32 // 32 bits if no LPAE + movge r0, #40 // 40 bits if LPAE + bx lr + ASM_FUNCTION_REMOVE_IF_UNREFERENCED diff --git a/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.asm b/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.asm index 219140c22b13..3eb52875971d 100644 --- a/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.asm +++ b/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.asm @@ -169,4 +169,12 @@ isb bx lr + RVCT_ASM_EXPORT ArmGetPhysicalAddressBits + mrc p15, 0, r0, c0, c1, 4 ; MMFR0 + and r0, r0, #0xf ; VMSA [3:0] + cmp r0, #5 ; >= 5 implies LPAE support + movlt r0, #32 ; 32 bits if no LPAE + movge r0, #40 ; 40 bits if LPAE + bx lr + END -- 2.19.1 _______________________________________________ edk2-devel mailing list [email protected] https://lists.01.org/mailman/listinfo/edk2-devel
