We introduced support for non-shareable cached mappings to the AArch64
version of ArmMmuLib a while ago, but the ARM version was left behind,
so fix it.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
 ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c 
b/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c
index 889b22867dc7..b237321a8d8b 100644
--- a/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c
+++ b/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c
@@ -135,6 +135,11 @@ PopulateLevel2PageTable (
     case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK:
       PageAttributes = TT_DESCRIPTOR_PAGE_WRITE_BACK;
       break;
+    case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_NONSHAREABLE:
+    case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK_NONSHAREABLE:
+      PageAttributes = TT_DESCRIPTOR_PAGE_WRITE_BACK;
+      PageAttributes &= ~TT_DESCRIPTOR_PAGE_S_SHARED;
+      break;
     case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH:
     case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH:
       PageAttributes = TT_DESCRIPTOR_PAGE_WRITE_THROUGH;
@@ -239,6 +244,10 @@ FillTranslationTable (
     case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK:
       Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK(0);
       break;
+    case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_NONSHAREABLE:
+      Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK(0);
+      Attributes &= ~TT_DESCRIPTOR_SECTION_S_SHARED;
+      break;
     case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH:
       Attributes = TT_DESCRIPTOR_SECTION_WRITE_THROUGH(0);
       break;
@@ -251,6 +260,10 @@ FillTranslationTable (
     case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK:
       Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK(1);
       break;
+    case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK_NONSHAREABLE:
+      Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK(1);
+      Attributes &= ~TT_DESCRIPTOR_SECTION_S_SHARED;
+      break;
     case ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH:
       Attributes = TT_DESCRIPTOR_SECTION_WRITE_THROUGH(1);
       break;
-- 
2.17.1

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