Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Pete Batard <p...@akeo.ie> --- Platform/Raspberry/Pi3/Drivers/DwUsbHostDxe/ComponentName.c | 226 +++ Platform/Raspberry/Pi3/Drivers/DwUsbHostDxe/DriverBinding.c | 275 ++++ Platform/Raspberry/Pi3/Drivers/DwUsbHostDxe/DwUsbHostDxe.c | 1637 ++++++++++++++++++++ Platform/Raspberry/Pi3/Drivers/DwUsbHostDxe/DwUsbHostDxe.h | 165 ++ Platform/Raspberry/Pi3/Drivers/DwUsbHostDxe/DwUsbHostDxe.inf | 52 + Platform/Raspberry/Pi3/Drivers/DwUsbHostDxe/DwcHw.h | 791 ++++++++++ Platform/Raspberry/Pi3/Include/Protocol/DwUsb.h | 53 + 7 files changed, 3199 insertions(+)
diff --git a/Platform/Raspberry/Pi3/Drivers/DwUsbHostDxe/ComponentName.c b/Platform/Raspberry/Pi3/Drivers/DwUsbHostDxe/ComponentName.c new file mode 100644 index 000000000000..0f4db4e21204 --- /dev/null +++ b/Platform/Raspberry/Pi3/Drivers/DwUsbHostDxe/ComponentName.c @@ -0,0 +1,226 @@ +/** @file + * + * Copyright (c) 2018, Andrey Warkentin <andrey.warken...@gmail.com> + * + * + * This program and the accompanying materials + * are licensed and made available under the terms and conditions of the BSD License + * which accompanies this distribution. The full text of the license may be found at + * http://opensource.org/licenses/bsd-license.php + * + * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + * + **/ + +#include "DwUsbHostDxe.h" + +STATIC +EFI_STATUS +EFIAPI +ComponentNameGetDriverName ( + IN EFI_COMPONENT_NAME_PROTOCOL *This, + IN CHAR8 *Language, + OUT CHAR16 **DriverName + ); + +STATIC +EFI_STATUS +EFIAPI +ComponentNameGetControllerName ( + IN EFI_COMPONENT_NAME_PROTOCOL *This, + IN EFI_HANDLE ControllerHandle, + IN EFI_HANDLE ChildHandle, + IN CHAR8 *Language, + OUT CHAR16 **ControllerName + ); + +// +// EFI Component Name Protocol +// +GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME_PROTOCOL gComponentName = { + ComponentNameGetDriverName, + ComponentNameGetControllerName, + "eng" +}; + +// +// EFI Component Name 2 Protocol +// +GLOBAL_REMOVE_IF_UNREFERENCED EFI_COMPONENT_NAME2_PROTOCOL gComponentName2 = { + (EFI_COMPONENT_NAME2_GET_DRIVER_NAME)ComponentNameGetDriverName, + (EFI_COMPONENT_NAME2_GET_CONTROLLER_NAME)ComponentNameGetControllerName, + "en" +}; + + +STATIC EFI_UNICODE_STRING_TABLE mDriverName[] = { + { + "eng;en", + (CHAR16*)L"Raspberry Pi USB Host Driver" + }, + { + NULL, + NULL + } +}; + +STATIC EFI_UNICODE_STRING_TABLE mDeviceName[] = { + { + "eng;en", + (CHAR16*)L"Raspberry Pi USB Host" + }, + { + NULL, + NULL + } +}; + +/** + Retrieves a Unicode string that is the user readable name of the driver. + + This function retrieves the user readable name of a driver in the form of a + Unicode string. If the driver specified by This has a user readable name in + the language specified by Language, then a pointer to the driver name is + returned in DriverName, and EFI_SUCCESS is returned. If the driver specified + by This does not support the language specified by Language, + then EFI_UNSUPPORTED is returned. + + @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or + EFI_COMPONENT_NAME_PROTOCOL instance. + + @param Language[in] A pointer to a Null-terminated ASCII string + array indicating the language. This is the + language of the driver name that the caller is + requesting, and it must match one of the + languages specified in SupportedLanguages. The + number of languages supported by a driver is up + to the driver writer. Language is specified + in RFC 4646 or ISO 639-2 language code format. + + @param DriverName[out] A pointer to the Unicode string to return. + This Unicode string is the name of the + driver specified by This in the language + specified by Language. + + @retval EFI_SUCCESS The Unicode string for the Driver specified by + This and the language specified by Language was + returned in DriverName. + + @retval EFI_INVALID_PARAMETER Language is NULL. + + @retval EFI_INVALID_PARAMETER DriverName is NULL. + + @retval EFI_UNSUPPORTED The driver specified by This does not support + the language specified by Language. + +**/ +STATIC +EFI_STATUS +EFIAPI +ComponentNameGetDriverName ( + IN EFI_COMPONENT_NAME_PROTOCOL *This, + IN CHAR8 *Language, + OUT CHAR16 **DriverName + ) +{ + return LookupUnicodeString2 ( + Language, + This->SupportedLanguages, + mDriverName, + DriverName, + (BOOLEAN)(This == &gComponentName) + ); +} + +/** + Retrieves a Unicode string that is the user readable name of the controller + that is being managed by a driver. + + This function retrieves the user readable name of the controller specified by + ControllerHandle and ChildHandle in the form of a Unicode string. If the + driver specified by This has a user readable name in the language specified by + Language, then a pointer to the controller name is returned in ControllerName, + and EFI_SUCCESS is returned. If the driver specified by This is not currently + managing the controller specified by ControllerHandle and ChildHandle, + then EFI_UNSUPPORTED is returned. If the driver specified by This does not + support the language specified by Language, then EFI_UNSUPPORTED is returned. + + @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or + EFI_COMPONENT_NAME_PROTOCOL instance. + + @param ControllerHandle[in] The handle of a controller that the driver + specified by This is managing. This handle + specifies the controller whose name is to be + returned. + + @param ChildHandle[in] The handle of the child controller to retrieve + the name of. This is an optional parameter that + may be NULL. It will be NULL for device + drivers. It will also be NULL for a bus drivers + that wish to retrieve the name of the bus + controller. It will not be NULL for a bus + driver that wishes to retrieve the name of a + child controller. + + @param Language[in] A pointer to a Null-terminated ASCII string + array indicating the language. This is the + language of the driver name that the caller is + requesting, and it must match one of the + languages specified in SupportedLanguages. The + number of languages supported by a driver is up + to the driver writer. Language is specified in + RFC 4646 or ISO 639-2 language code format. + + @param ControllerName[out] A pointer to the Unicode string to return. + This Unicode string is the name of the + controller specified by ControllerHandle and + ChildHandle in the language specified by + Language from the point of view of the driver + specified by This. + + @retval EFI_SUCCESS The Unicode string for the user readable name in + the language specified by Language for the + driver specified by This was returned in + DriverName. + + @retval EFI_INVALID_PARAMETER ControllerHandle is NULL. + + @retval EFI_INVALID_PARAMETER ChildHandle is not NULL and it is not a valid + EFI_HANDLE. + + @retval EFI_INVALID_PARAMETER Language is NULL. + + @retval EFI_INVALID_PARAMETER ControllerName is NULL. + + @retval EFI_UNSUPPORTED The driver specified by This is not currently + managing the controller specified by + ControllerHandle and ChildHandle. + + @retval EFI_UNSUPPORTED The driver specified by This does not support + the language specified by Language. + +**/ +STATIC +EFI_STATUS +EFIAPI +ComponentNameGetControllerName ( + IN EFI_COMPONENT_NAME_PROTOCOL *This, + IN EFI_HANDLE ControllerHandle, + IN EFI_HANDLE ChildHandle, + IN CHAR8 *Language, + OUT CHAR16 **ControllerName + ) +{ + if (ChildHandle != NULL) { + return EFI_UNSUPPORTED; + } + + return LookupUnicodeString2 ( + Language, + This->SupportedLanguages, + mDeviceName, + ControllerName, + (BOOLEAN)(This == &gComponentName) + ); +} diff --git a/Platform/Raspberry/Pi3/Drivers/DwUsbHostDxe/DriverBinding.c b/Platform/Raspberry/Pi3/Drivers/DwUsbHostDxe/DriverBinding.c new file mode 100644 index 000000000000..9b9e59cede19 --- /dev/null +++ b/Platform/Raspberry/Pi3/Drivers/DwUsbHostDxe/DriverBinding.c @@ -0,0 +1,275 @@ +/** @file + * + * Copyright (c) 2018, Andrey Warkentin <andrey.warken...@gmail.com> + * + * + * This program and the accompanying materials + * are licensed and made available under the terms and conditions of the BSD License + * which accompanies this distribution. The full text of the license may be found at + * http://opensource.org/licenses/bsd-license.php + * + * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + * + **/ + +#include "DwUsbHostDxe.h" + +STATIC +EFI_STATUS +EFIAPI +DriverSupported ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath + ); + +STATIC +EFI_STATUS +EFIAPI +DriverStart ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath + ); + +STATIC +EFI_STATUS +EFIAPI +DriverStop ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN UINTN NumberOfChildren, + IN EFI_HANDLE *ChildHandleBuffer + ); + +STATIC EFI_DRIVER_BINDING_PROTOCOL mDriverBinding = { + DriverSupported, + DriverStart, + DriverStop, + 0xa, + NULL, + NULL +}; + +STATIC EFI_DW_DEVICE_PATH mDevicePath = { + { + { + HARDWARE_DEVICE_PATH, + HW_VENDOR_DP, + { + (UINT8)(sizeof (VENDOR_DEVICE_PATH)), + (UINT8)((sizeof (VENDOR_DEVICE_PATH)) >> 8), + } + }, + EFI_CALLER_ID_GUID + }, + { + END_DEVICE_PATH_TYPE, + END_ENTIRE_DEVICE_PATH_SUBTYPE, + { + sizeof (EFI_DEVICE_PATH_PROTOCOL), + 0 + } + } +}; + +STATIC EFI_HANDLE mDevice; +STATIC RASPBERRY_PI_FIRMWARE_PROTOCOL *mFwProtocol; + +STATIC +EFI_STATUS +EFIAPI +DriverSupported ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath + ) +{ + VOID *Temp; + EFI_STATUS Status; + + if (Controller != mDevice) { + return EFI_UNSUPPORTED; + } + + Status = gBS->LocateProtocol (&gRaspberryPiFirmwareProtocolGuid, NULL, + (VOID**)&mFwProtocol); + if (EFI_ERROR (Status)) { + return EFI_NOT_READY; + } + + if (gBS->HandleProtocol (Controller, &gEfiUsb2HcProtocolGuid, + (VOID**)&Temp) == EFI_SUCCESS) { + return EFI_ALREADY_STARTED; + } + + return EFI_SUCCESS; +} + +STATIC +EFI_STATUS +EFIAPI +DriverStart ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath + ) +{ + VOID *Dummy; + EFI_STATUS Status; + DWUSB_OTGHC_DEV *DwHc = NULL; + + Status = gBS->OpenProtocol ( + Controller, + &gEfiCallerIdGuid, + (VOID**)&Dummy, + This->DriverBindingHandle, + Controller, + EFI_OPEN_PROTOCOL_BY_DRIVER + ); + if (EFI_ERROR (Status)) { + return Status; + } + + Status = mFwProtocol->SetPowerState (RPI_MBOX_POWER_STATE_USB_HCD, TRUE, TRUE); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "Couldn't power on USB: %r\n", Status)); + return Status; + } + + Status = CreateDwUsbHc (&DwHc); + if (EFI_ERROR (Status)) { + goto Exit; + } + + /* + * UsbBusDxe as of b4e96b82b4e2e47e95014b51787ba5b43abac784 expects + * the HCD to do this. There is no agent invoking DwHcReset anymore. + */ + DwHcReset (&DwHc->DwUsbOtgHc, 0); + DwHcSetState (&DwHc->DwUsbOtgHc, EfiUsbHcStateOperational); + + Status = gBS->InstallMultipleProtocolInterfaces ( + &Controller, + &gEfiUsb2HcProtocolGuid, &DwHc->DwUsbOtgHc, + NULL + ); + +Exit: + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "Could not start DwUsbHostDxe: %r\n", Status)); + + DestroyDwUsbHc (DwHc); + + mFwProtocol->SetPowerState (RPI_MBOX_POWER_STATE_USB_HCD, FALSE, FALSE); + + gBS->CloseProtocol ( + Controller, + &gEfiCallerIdGuid, + This->DriverBindingHandle, + Controller + ); + } + return Status; +} + +STATIC +EFI_STATUS +EFIAPI +DriverStop ( + IN EFI_DRIVER_BINDING_PROTOCOL *This, + IN EFI_HANDLE Controller, + IN UINTN NumberOfChildren, + IN EFI_HANDLE *ChildHandleBuffer + ) +{ + EFI_STATUS Status; + DWUSB_OTGHC_DEV *DwHc; + EFI_USB2_HC_PROTOCOL *HcProtocol; + + Status = gBS->HandleProtocol ( + Controller, + &gEfiUsb2HcProtocolGuid, + (VOID**)&HcProtocol + ); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "DriverStop: HandleProtocol: %r\n", Status)); + return Status; + } + + DwHc = DWHC_FROM_THIS (HcProtocol); + + Status = gBS->UninstallMultipleProtocolInterfaces ( + Controller, + &gEfiUsb2HcProtocolGuid, &DwHc->DwUsbOtgHc, + NULL); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "DriverStop: UninstallMultipleProtocolInterfaces: %r\n", + Status)); + return Status; + } + + DwHcQuiesce (DwHc); + DestroyDwUsbHc (DwHc); + + gBS->CloseProtocol ( + Controller, + &gEfiCallerIdGuid, + This->DriverBindingHandle, + Controller + ); + + return EFI_SUCCESS; +} + +/** + UEFI Driver Entry Point API + + @param ImageHandle EFI_HANDLE. + @param SystemTable EFI_SYSTEM_TABLE. + + @return EFI_SUCCESS Success. + EFI_DEVICE_ERROR Fail. +**/ + +EFI_STATUS +EFIAPI +DwUsbHostEntryPoint ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + EFI_STATUS Status; + + Status = gBS->InstallMultipleProtocolInterfaces ( + &mDevice, + &gEfiDevicePathProtocolGuid, &mDevicePath, + &gEfiCallerIdGuid, NULL, + NULL); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "InstallMultipleProtocolInterfaces: %r\n", Status)); + return Status; + } + + Status = EfiLibInstallDriverBindingComponentName2 ( + ImageHandle, + SystemTable, + &mDriverBinding, + ImageHandle, + &gComponentName, + &gComponentName2 + ); + + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "EfiLibInstallDriverBindingComponentName2: %r\n", Status)); + gBS->UninstallMultipleProtocolInterfaces ( + mDevice, + &gEfiDevicePathProtocolGuid, &mDevicePath, + &gEfiCallerIdGuid, NULL, + NULL + ); + } + + return Status; +} diff --git a/Platform/Raspberry/Pi3/Drivers/DwUsbHostDxe/DwUsbHostDxe.c b/Platform/Raspberry/Pi3/Drivers/DwUsbHostDxe/DwUsbHostDxe.c new file mode 100644 index 000000000000..b4b0b6ea87f0 --- /dev/null +++ b/Platform/Raspberry/Pi3/Drivers/DwUsbHostDxe/DwUsbHostDxe.c @@ -0,0 +1,1637 @@ +/** @file + * + * Copyright (c) 2017-2018, Andrey Warkentin <andrey.warken...@gmail.com> + * Copyright (c) 2015-2016, Linaro Limited. All rights reserved. + * Copyright (c) 2014 Marek Vasut <ma...@denx.de> + * Copyright (c) 2012 Oleksandr Tymoshenko <go...@freebsd.org> + * + * This program and the accompanying materials + * are licensed and made available under the terms and conditions of the BSD License + * which accompanies this distribution. The full text of the license may be found at + * http://opensource.org/licenses/bsd-license.php + * + * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + * + **/ + +#include "DwUsbHostDxe.h" +#include "DwcHw.h" + +/* + * Excessive (10s) timeout for reset. + */ +#define DW_HC_RESET_TIMEOUT_MS (10000) + + /* + * TimerPeriodic to account for timeout processing + * within DwHcTransfer. + */ +#define TimerForTransfer TimerRelative + +/* + * https://www.quicklogic.com/assets/pdf/data-sheets/QL-Hi-Speed-USB-2.0-OTG-Controller-Data-Sheet.pdf + */ + +typedef enum { + XFER_NOT_HALTED, + XFER_ERROR, + XFER_CSPLIT, + XFER_NAK, + XFER_STALL, + XFER_FRMOVRUN, + XFER_DONE +} CHANNEL_HALT_REASON; + +typedef struct { + BOOLEAN Splitting; + BOOLEAN SplitStart; + UINT32 Tries; +} SPLIT_CONTROL; + +EFI_STATUS +DwHcInit ( + IN DWUSB_OTGHC_DEV *DwHc, + IN EFI_EVENT Timeout + ); + +EFI_STATUS +DwCoreInit ( + IN DWUSB_OTGHC_DEV *DwHc, + IN EFI_EVENT Timeout + ); + +UINT32 +Wait4Bit ( + IN EFI_EVENT Timeout, + IN UINT32 Reg, + IN UINT32 Mask, + IN BOOLEAN Set + ) +{ + UINT32 Value; + + do { + Value = MmioRead32 (Reg); + if (!Set) { + Value = ~Value; + } + + if ((Value & Mask) == Mask) { + return 0; + } + } while (EFI_ERROR (gBS->CheckEvent (Timeout))); + + DEBUG ((DEBUG_ERROR, "Wait4Bit: %a timeout (reg:0x%x, value:0x%x, mask:0x%x)\n", + Set ? "set" : "clear", Reg, Set ? Value : ~Value, Mask)); + + return 1; +} + +CHANNEL_HALT_REASON +Wait4Chhltd ( + IN DWUSB_OTGHC_DEV *DwHc, + IN EFI_EVENT Timeout, + IN UINT32 Channel, + IN UINT32 *Sub, + IN UINT32 *Toggle, + IN BOOLEAN IgnoreAck, + IN SPLIT_CONTROL *Split + ) +{ + INT32 Ret; + UINT32 Hcint, Hctsiz; + UINT32 HcintCompHltAck = DWC2_HCINT_XFERCOMP; + + MicroSecondDelay (100); + Ret = Wait4Bit (Timeout, DwHc->DwUsbBase + HCINT (Channel), DWC2_HCINT_CHHLTD, 1); + if (Ret) { + DEBUG ((DEBUG_ERROR, "Channel %u did not halt\n", Channel)); + return XFER_NOT_HALTED; + } + + MicroSecondDelay (100); + Hcint = MmioRead32 (DwHc->DwUsbBase + HCINT (Channel)); + + ASSERT ((Hcint & DWC2_HCINT_CHHLTD) != 0); + Hcint &= ~DWC2_HCINT_CHHLTD; + + if (!IgnoreAck || + (Split->Splitting && Split->SplitStart)) { + HcintCompHltAck |= DWC2_HCINT_ACK; + } else { + Hcint &= ~DWC2_HCINT_ACK; + } + + if ((Hcint & DWC2_HCINT_XACTERR) != 0) { + return XFER_ERROR; + } + + if ((Hcint & DWC2_HCINT_NYET) != 0) { + return XFER_CSPLIT; + } + + if ((Hcint & DWC2_HCINT_NAK) != 0) { + return XFER_NAK; + } + + if ((Hcint & DWC2_HCINT_STALL) != 0) { + return XFER_STALL; + } + + if ((Hcint & DWC2_HCINT_FRMOVRUN) != 0) { + return XFER_FRMOVRUN; + } + + if (Split->Splitting && + Split->SplitStart && + ((Hcint & DWC2_HCINT_ACK) != 0)) { + Split->SplitStart = FALSE; + Split->Tries = 0; + return XFER_CSPLIT; + } + + if (Hcint != HcintCompHltAck) { + DEBUG ((DEBUG_ERROR, "Wait4Chhltd: Channel %u HCINT 0x%x %a%a\n", + Channel, Hcint, + IgnoreAck ? "IgnoreAck " : "", + Split->SplitStart ? "split start" : + (Split->Splitting ? "split complete" : ""))); + return XFER_ERROR; + } + + Hctsiz = MmioRead32 (DwHc->DwUsbBase + HCTSIZ (Channel)); + *Sub = (Hctsiz & DWC2_HCTSIZ_XFERSIZE_MASK) >> DWC2_HCTSIZ_XFERSIZE_OFFSET; + *Toggle = (Hctsiz & DWC2_HCTSIZ_PID_MASK) >> DWC2_HCTSIZ_PID_OFFSET; + + return XFER_DONE; +} + +VOID +DwOtgHcInit ( + IN DWUSB_OTGHC_DEV *DwHc, + IN UINT8 HcNum, + IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator, + IN UINT8 DeviceSpeed, + IN UINT8 DevAddr, + IN UINT8 Endpoint, + IN UINT8 EpDir, + IN UINT8 EpType, + IN UINT16 MaxPacket, + IN SPLIT_CONTROL *SplitControl + ) +{ + UINT32 Split = 0; + UINT32 Hcchar = (DevAddr << DWC2_HCCHAR_DEVADDR_OFFSET) | + (Endpoint << DWC2_HCCHAR_EPNUM_OFFSET) | + (EpDir << DWC2_HCCHAR_EPDIR_OFFSET) | + (EpType << DWC2_HCCHAR_EPTYPE_OFFSET) | + (MaxPacket << DWC2_HCCHAR_MPS_OFFSET) | + ((DeviceSpeed == EFI_USB_SPEED_LOW) ? DWC2_HCCHAR_LSPDDEV : 0); + + MmioWrite32 (DwHc->DwUsbBase + HCINT (HcNum), 0x3FFF); + + MmioWrite32 (DwHc->DwUsbBase + HCCHAR (HcNum), Hcchar); + + if (SplitControl->Splitting) { + Split = DWC2_HCSPLT_SPLTENA | + ((Translator->TranslatorPortNumber) << DWC2_HCSPLT_PRTADDR_OFFSET) | + ((Translator->TranslatorHubAddress) << DWC2_HCSPLT_HUBADDR_OFFSET); + + if (!SplitControl->SplitStart) { + Split |= DWC2_HCSPLT_COMPSPLT; + } + } + + MmioWrite32 (DwHc->DwUsbBase + HCSPLT (HcNum), Split); +} + +EFI_STATUS +DwCoreReset ( + IN DWUSB_OTGHC_DEV *DwHc, + IN EFI_EVENT Timeout + ) +{ + UINT32 Status; + + Status = Wait4Bit (Timeout, DwHc->DwUsbBase + GRSTCTL, DWC2_GRSTCTL_AHBIDLE, 1); + if (Status) { + DEBUG ((DEBUG_ERROR, "DwCoreReset: AHBIDLE Timeout!\n")); + return Status; + } + + MmioWrite32 (DwHc->DwUsbBase + GRSTCTL, DWC2_GRSTCTL_CSFTRST); + + Status = Wait4Bit (Timeout, DwHc->DwUsbBase + GRSTCTL, DWC2_GRSTCTL_CSFTRST, 0); + if (Status) { + DEBUG ((DEBUG_ERROR, "DwCoreReset: CSFTRST Timeout!\n")); + return Status; + } + + MicroSecondDelay (100000); + return EFI_SUCCESS; +} + +STATIC +EFI_STATUS +DwHcTransfer ( + IN DWUSB_OTGHC_DEV *DwHc, + IN EFI_EVENT Timeout, + IN UINT32 Channel, + IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator, + IN UINT8 DeviceSpeed, + IN UINT8 DeviceAddress, + IN UINTN MaximumPacketLength, + IN OUT UINT32 *Pid, + IN UINT32 TransferDirection, + IN OUT VOID *Data, + IN OUT UINTN *DataLength, + IN UINT32 EpAddress, + IN UINT32 EpType, + OUT UINT32 *TransferResult, + IN BOOLEAN IgnoreAck + ) +{ + UINT32 TxferLen; + UINT32 Done = 0; + UINT32 NumPackets; + UINT32 Sub; + UINT32 Ret = 0; + UINT32 StopTransfer = 0; + EFI_STATUS Status = EFI_SUCCESS; + SPLIT_CONTROL Split = { 0 }; + + EFI_TPL Tpl = gBS->RaiseTPL (TPL_NOTIFY); + + *TransferResult = EFI_USB_NOERROR; + + do { + RestartXfer: + if (DeviceSpeed == EFI_USB_SPEED_LOW || + DeviceSpeed == EFI_USB_SPEED_FULL) { + Split.Splitting = TRUE; + Split.SplitStart = TRUE; + Split.Tries = 0; + } + + TxferLen = *DataLength - Done; + + if (TxferLen > DWC2_MAX_TRANSFER_SIZE) { + TxferLen = DWC2_MAX_TRANSFER_SIZE - MaximumPacketLength + 1; + } + + if (TxferLen > DWC2_DATA_BUF_SIZE) { + TxferLen = DWC2_DATA_BUF_SIZE - MaximumPacketLength + 1; + } + + if (Split.Splitting || TxferLen == 0) { + NumPackets = 1; + } else { + NumPackets = (TxferLen + MaximumPacketLength - 1) / MaximumPacketLength; + if (NumPackets > DWC2_MAX_PACKET_COUNT) { + NumPackets = DWC2_MAX_PACKET_COUNT; + TxferLen = NumPackets * MaximumPacketLength; + } + } + + if (TransferDirection) { // in + TxferLen = NumPackets * MaximumPacketLength; + } else { + CopyMem (DwHc->AlignedBuffer, Data + Done, TxferLen); + ArmDataSynchronizationBarrier (); + } + + RestartChannel: + MmioWrite32 (DwHc->DwUsbBase + HCDMA (Channel), + (UINTN)DwHc->AlignedBufferBusAddress); + + DwOtgHcInit (DwHc, Channel, Translator, DeviceSpeed, + DeviceAddress, EpAddress, + TransferDirection, EpType, + MaximumPacketLength, &Split); + + MmioWrite32 (DwHc->DwUsbBase + HCTSIZ (Channel), + (TxferLen << DWC2_HCTSIZ_XFERSIZE_OFFSET) | + (NumPackets << DWC2_HCTSIZ_PKTCNT_OFFSET) | + (*Pid << DWC2_HCTSIZ_PID_OFFSET)); + + MmioAndThenOr32 (DwHc->DwUsbBase + HCCHAR (Channel), + ~(DWC2_HCCHAR_MULTICNT_MASK | + DWC2_HCCHAR_CHEN | + DWC2_HCCHAR_CHDIS), + ((1 << DWC2_HCCHAR_MULTICNT_OFFSET) | + DWC2_HCCHAR_CHEN)); + + Ret = Wait4Chhltd (DwHc, Timeout, Channel, &Sub, Pid, IgnoreAck, &Split); + + if (Ret == XFER_NOT_HALTED) { + /* + * FIXME: do proper channel reset. + */ + MmioWrite32 (DwHc->DwUsbBase + HCCHAR (Channel), DWC2_HCCHAR_CHDIS); + + *TransferResult = EFI_USB_ERR_TIMEOUT; + Status = EFI_DEVICE_ERROR; + break; + } else if (Ret == XFER_STALL) { + *TransferResult = EFI_USB_ERR_STALL; + Status = EFI_DEVICE_ERROR; + break; + } else if (Ret == XFER_CSPLIT) { + ASSERT (Split.Splitting); + + if (Split.Tries++ < 3) { + goto RestartChannel; + } + + goto RestartXfer; + } else if (Ret == XFER_ERROR) { + *TransferResult = + EFI_USB_ERR_CRC | + EFI_USB_ERR_TIMEOUT | + EFI_USB_ERR_BITSTUFF | + EFI_USB_ERR_SYSTEM; + Status = EFI_DEVICE_ERROR; + break; + } else if (Ret == XFER_FRMOVRUN) { + goto RestartChannel; + } else if (Ret == XFER_NAK) { + if (Split.Splitting && + (EpType == DWC2_HCCHAR_EPTYPE_CONTROL)) { + goto RestartXfer; + } + + *TransferResult = EFI_USB_ERR_NAK; + Status = EFI_DEVICE_ERROR; + break; + } + + if (TransferDirection) { // in + ArmDataSynchronizationBarrier (); + TxferLen -= Sub; + CopyMem (Data + Done, DwHc->AlignedBuffer, TxferLen); + if (Sub) { + StopTransfer = 1; + } + } + + Done += TxferLen; + } while (Done < *DataLength && !StopTransfer); + + MmioWrite32 (DwHc->DwUsbBase + HCINTMSK (Channel), 0); + MmioWrite32 (DwHc->DwUsbBase + HCINT (Channel), 0xFFFFFFFF); + + *DataLength = Done; + + gBS->RestoreTPL (Tpl); + + ASSERT (!EFI_ERROR (Status) || *TransferResult != EFI_USB_NOERROR); + + return Status; +} + +STATIC +DWUSB_DEFERRED_REQ * +DwHcFindDeferredTransfer ( + IN DWUSB_OTGHC_DEV *DwHc, + IN UINT8 DeviceAddress, + IN UINT8 EndPointAddress + ) +{ + LIST_ENTRY *Entry; + + EFI_LIST_FOR_EACH (Entry, &DwHc->DeferredList) { + DWUSB_DEFERRED_REQ *Req = EFI_LIST_CONTAINER (Entry, DWUSB_DEFERRED_REQ, List); + + if (Req->DeviceAddress == DeviceAddress && + Req->EpAddress == (EndPointAddress & 0xF) && + Req->TransferDirection == ((EndPointAddress >> 7) & 0x01)) { + return Req; + } + } + + return NULL; +} + +STATIC +VOID +DwHcDeferredTransfer ( + IN DWUSB_DEFERRED_REQ *Req + ) +{ + EFI_STATUS Status; + EFI_EVENT TimeoutEvt = NULL; + + Status = gBS->CreateEvent (EVT_TIMER, 0, NULL, NULL, &TimeoutEvt); + ASSERT_EFI_ERROR (Status); + if (EFI_ERROR (Status)) { + goto Exit; + } + + Status = gBS->SetTimer (TimeoutEvt, TimerForTransfer, + EFI_TIMER_PERIOD_MILLISECONDS (Req->TimeOut)); + ASSERT_EFI_ERROR (Status); + if (EFI_ERROR (Status)) { + goto Exit; + } + + Req->TransferResult = EFI_USB_NOERROR; + Status = DwHcTransfer (Req->DwHc, TimeoutEvt, + Req->Channel, Req->Translator, + Req->DeviceSpeed, Req->DeviceAddress, + Req->MaximumPacketLength, &Req->Pid, + Req->TransferDirection, Req->Data, &Req->DataLength, + Req->EpAddress, Req->EpType, &Req->TransferResult, + Req->IgnoreAck); + + if (Req->EpType == DWC2_HCCHAR_EPTYPE_INTR && + Status == EFI_DEVICE_ERROR && + Req->TransferResult == EFI_USB_ERR_NAK) { + /* + * Swallow the NAK, the upper layer expects us to resubmit automatically. + */ + goto Exit; + } + + Req->CallbackFunction (Req->Data, Req->DataLength, + Req->CallbackContext, + Req->TransferResult); +Exit: + if (TimeoutEvt != NULL) { + gBS->CloseEvent (TimeoutEvt); + } +} + +/** + EFI_USB2_HC_PROTOCOL APIs +**/ + +EFI_STATUS +EFIAPI +DwHcGetCapability ( + IN EFI_USB2_HC_PROTOCOL *This, + OUT UINT8 *MaxSpeed, + OUT UINT8 *PortNumber, + OUT UINT8 *Is64BitCapable + ) +{ + if ((MaxSpeed == NULL) || (PortNumber == NULL) || (Is64BitCapable == NULL)) { + return EFI_INVALID_PARAMETER; + } + + *MaxSpeed = EFI_USB_SPEED_HIGH; + *PortNumber = 1; + *Is64BitCapable = 1; + + return EFI_SUCCESS; +} + +EFI_STATUS +EFIAPI +DwHcReset ( + IN EFI_USB2_HC_PROTOCOL *This, + IN UINT16 Attributes + ) +{ + EFI_STATUS Status; + EFI_EVENT TimeoutEvt = NULL; + + DWUSB_OTGHC_DEV *DwHc; + DwHc = DWHC_FROM_THIS (This); + + Status = gBS->CreateEvent (EVT_TIMER, 0, NULL, NULL, &TimeoutEvt); + ASSERT_EFI_ERROR (Status); + if (EFI_ERROR (Status)) { + goto Exit; + } + + Status = gBS->SetTimer (TimeoutEvt, TimerRelative, + EFI_TIMER_PERIOD_MILLISECONDS (DW_HC_RESET_TIMEOUT_MS)); + ASSERT_EFI_ERROR (Status); + if (EFI_ERROR (Status)) { + goto Exit; + } + + Status = DwCoreInit (DwHc, TimeoutEvt); + if (Status != EFI_SUCCESS) { + DEBUG ((DEBUG_ERROR, "DwCoreInit failed\n")); + goto Exit; + } + + Status = DwHcInit (DwHc, TimeoutEvt); + if (Status != EFI_SUCCESS) { + DEBUG ((DEBUG_ERROR, "DwHcInit failed\n")); + goto Exit; + } + + MmioAndThenOr32 (DwHc->DwUsbBase + HPRT0, + ~(DWC2_HPRT0_PRTENA | DWC2_HPRT0_PRTCONNDET | + DWC2_HPRT0_PRTENCHNG | DWC2_HPRT0_PRTOVRCURRCHNG), + DWC2_HPRT0_PRTRST); + + MicroSecondDelay (50000); + + MmioAnd32 (DwHc->DwUsbBase + HPRT0, ~(DWC2_HPRT0_PRTENA | DWC2_HPRT0_PRTCONNDET | + DWC2_HPRT0_PRTENCHNG | DWC2_HPRT0_PRTOVRCURRCHNG | + DWC2_HPRT0_PRTRST)); + +Exit: + if (TimeoutEvt != NULL) { + gBS->CloseEvent (TimeoutEvt); + } + + return Status; +} + +EFI_STATUS +EFIAPI +DwHcGetState ( + IN EFI_USB2_HC_PROTOCOL *This, + OUT EFI_USB_HC_STATE *State + ) +{ + DWUSB_OTGHC_DEV *DwHc; + + DwHc = DWHC_FROM_THIS (This); + + *State = DwHc->DwHcState; + + return EFI_SUCCESS; +} + +EFI_STATUS +EFIAPI +DwHcSetState ( + IN EFI_USB2_HC_PROTOCOL *This, + IN EFI_USB_HC_STATE State + ) +{ + DWUSB_OTGHC_DEV *DwHc; + + DwHc = DWHC_FROM_THIS (This); + + DwHc->DwHcState = State; + + return EFI_SUCCESS; +} + +EFI_STATUS +EFIAPI +DwHcGetRootHubPortStatus ( + IN EFI_USB2_HC_PROTOCOL *This, + IN UINT8 PortNumber, + OUT EFI_USB_PORT_STATUS *PortStatus + ) +{ + DWUSB_OTGHC_DEV *DwHc; + UINT32 Hprt0; + + if (PortNumber > DWC2_HC_PORT) { + return EFI_INVALID_PARAMETER; + } + + if (PortStatus == NULL) { + return EFI_INVALID_PARAMETER; + } + + DwHc = DWHC_FROM_THIS (This); + + PortStatus->PortStatus = 0; + PortStatus->PortChangeStatus = 0; + Hprt0 = MmioRead32 (DwHc->DwUsbBase + HPRT0); + + if (Hprt0 & DWC2_HPRT0_PRTCONNSTS) { + PortStatus->PortStatus |= USB_PORT_STAT_CONNECTION; + } + + if (Hprt0 & DWC2_HPRT0_PRTENA) { + PortStatus->PortStatus |= USB_PORT_STAT_ENABLE; + } + + if (Hprt0 & DWC2_HPRT0_PRTSUSP) { + PortStatus->PortStatus |= USB_PORT_STAT_SUSPEND; + } + + if (Hprt0 & DWC2_HPRT0_PRTOVRCURRACT) { + PortStatus->PortStatus |= USB_PORT_STAT_OVERCURRENT; + } + + if (Hprt0 & DWC2_HPRT0_PRTRST) { + PortStatus->PortStatus |= USB_PORT_STAT_RESET; + } + + if (Hprt0 & DWC2_HPRT0_PRTPWR) { + PortStatus->PortStatus |= USB_PORT_STAT_POWER; + } + + PortStatus->PortStatus |= USB_PORT_STAT_HIGH_SPEED; + + if (Hprt0 & DWC2_HPRT0_PRTENCHNG) { + // PortStatus->PortChangeStatus |= USB_PORT_STAT_C_ENABLE; + } + + if (Hprt0 & DWC2_HPRT0_PRTCONNDET) { + PortStatus->PortChangeStatus |= USB_PORT_STAT_C_CONNECTION; + } + + if (Hprt0 & DWC2_HPRT0_PRTOVRCURRCHNG) { + PortStatus->PortChangeStatus |= USB_PORT_STAT_C_OVERCURRENT; + } + + return EFI_SUCCESS; +} + +EFI_STATUS +EFIAPI +DwHcSetRootHubPortFeature ( + IN EFI_USB2_HC_PROTOCOL *This, + IN UINT8 PortNumber, + IN EFI_USB_PORT_FEATURE PortFeature + ) +{ + DWUSB_OTGHC_DEV *DwHc; + UINT32 Hprt0; + EFI_STATUS Status = EFI_SUCCESS; + + if (PortNumber > DWC2_HC_PORT) { + Status = EFI_INVALID_PARAMETER; + goto Exit; + } + + DwHc = DWHC_FROM_THIS (This); + + switch (PortFeature) { + case EfiUsbPortEnable: + break; + case EfiUsbPortSuspend: + Hprt0 = MmioRead32 (DwHc->DwUsbBase + HPRT0); + Hprt0 &= ~(DWC2_HPRT0_PRTENA | DWC2_HPRT0_PRTCONNDET | + DWC2_HPRT0_PRTENCHNG | DWC2_HPRT0_PRTOVRCURRCHNG); + Hprt0 |= DWC2_HPRT0_PRTSUSP; + MmioWrite32 (DwHc->DwUsbBase + HPRT0, Hprt0); + break; + case EfiUsbPortReset: + MmioAndThenOr32 (DwHc->DwUsbBase + HPRT0, + ~(DWC2_HPRT0_PRTENA | DWC2_HPRT0_PRTCONNDET | + DWC2_HPRT0_PRTENCHNG | DWC2_HPRT0_PRTOVRCURRCHNG), + DWC2_HPRT0_PRTRST); + MicroSecondDelay (50000); + MmioAnd32 (DwHc->DwUsbBase + HPRT0, ~DWC2_HPRT0_PRTRST); + break; + case EfiUsbPortPower: + Hprt0 = MmioRead32 (DwHc->DwUsbBase + HPRT0); + Hprt0 &= ~(DWC2_HPRT0_PRTENA | DWC2_HPRT0_PRTCONNDET | + DWC2_HPRT0_PRTENCHNG | DWC2_HPRT0_PRTOVRCURRCHNG); + Hprt0 |= DWC2_HPRT0_PRTPWR; + MmioWrite32 (DwHc->DwUsbBase + HPRT0, Hprt0); + break; + case EfiUsbPortOwner: + break; + default: + Status = EFI_INVALID_PARAMETER; + break; + } + +Exit: + return Status; +} + +EFI_STATUS +EFIAPI +DwHcClearRootHubPortFeature ( + IN EFI_USB2_HC_PROTOCOL *This, + IN UINT8 PortNumber, + IN EFI_USB_PORT_FEATURE PortFeature + ) +{ + DWUSB_OTGHC_DEV *DwHc; + UINT32 Hprt0; + EFI_STATUS Status = EFI_SUCCESS; + + if (PortNumber > DWC2_HC_PORT) { + Status = EFI_INVALID_PARAMETER; + goto Exit; + } + + DwHc = DWHC_FROM_THIS (This); + + switch (PortFeature) { + case EfiUsbPortEnable: + Hprt0 = MmioRead32 (DwHc->DwUsbBase + HPRT0); + Hprt0 &= ~(DWC2_HPRT0_PRTENA | DWC2_HPRT0_PRTCONNDET | + DWC2_HPRT0_PRTENCHNG | DWC2_HPRT0_PRTOVRCURRCHNG); + Hprt0 |= DWC2_HPRT0_PRTENA; + MmioWrite32 (DwHc->DwUsbBase + HPRT0, Hprt0); + break; + case EfiUsbPortReset: + MmioAndThenOr32 (DwHc->DwUsbBase + HPRT0, + ~(DWC2_HPRT0_PRTENA | DWC2_HPRT0_PRTCONNDET | + DWC2_HPRT0_PRTENCHNG | DWC2_HPRT0_PRTOVRCURRCHNG), + DWC2_HPRT0_PRTRST); + MicroSecondDelay (50000); + MmioAnd32 (DwHc->DwUsbBase + HPRT0, ~DWC2_HPRT0_PRTRST); + break; + case EfiUsbPortSuspend: + MmioWrite32 (DwHc->DwUsbBase + PCGCCTL, 0); + MicroSecondDelay (40000); + Hprt0 = MmioRead32 (DwHc->DwUsbBase + HPRT0); + Hprt0 &= ~(DWC2_HPRT0_PRTENA | DWC2_HPRT0_PRTCONNDET | + DWC2_HPRT0_PRTENCHNG | DWC2_HPRT0_PRTOVRCURRCHNG); + Hprt0 |= DWC2_HPRT0_PRTRES; + MmioWrite32 (DwHc->DwUsbBase + HPRT0, Hprt0); + Hprt0 &= ~DWC2_HPRT0_PRTSUSP; + MicroSecondDelay (150000); + Hprt0 &= ~DWC2_HPRT0_PRTRES; + MmioWrite32 (DwHc->DwUsbBase + HPRT0, Hprt0); + break; + case EfiUsbPortPower: + Hprt0 = MmioRead32 (DwHc->DwUsbBase + HPRT0); + Hprt0 &= ~(DWC2_HPRT0_PRTENA | DWC2_HPRT0_PRTCONNDET | + DWC2_HPRT0_PRTENCHNG | DWC2_HPRT0_PRTOVRCURRCHNG); + Hprt0 &= ~DWC2_HPRT0_PRTPWR; + MmioWrite32 (DwHc->DwUsbBase + HPRT0, Hprt0); + break; + case EfiUsbPortOwner: + break; + case EfiUsbPortConnectChange: + Hprt0 = MmioRead32 (DwHc->DwUsbBase + HPRT0); + Hprt0 &= ~DWC2_HPRT0_PRTCONNDET; + MmioWrite32 (DwHc->DwUsbBase + HPRT0, Hprt0); + break; + case EfiUsbPortResetChange: + break; + case EfiUsbPortEnableChange: + Hprt0 = MmioRead32 (DwHc->DwUsbBase + HPRT0); + Hprt0 &= ~DWC2_HPRT0_PRTENCHNG; + MmioWrite32 (DwHc->DwUsbBase + HPRT0, Hprt0); + break; + case EfiUsbPortSuspendChange: + break; + case EfiUsbPortOverCurrentChange: + Hprt0 = MmioRead32 (DwHc->DwUsbBase + HPRT0); + Hprt0 &= ~DWC2_HPRT0_PRTOVRCURRCHNG; + MmioWrite32 (DwHc->DwUsbBase + HPRT0, Hprt0); + break; + default: + Status = EFI_INVALID_PARAMETER; + break; + } + +Exit: + return Status; +} + +EFI_STATUS +EFIAPI +DwHcControlTransfer ( + IN EFI_USB2_HC_PROTOCOL *This, + IN UINT8 DeviceAddress, + IN UINT8 DeviceSpeed, + IN UINTN MaximumPacketLength, + IN EFI_USB_DEVICE_REQUEST *Request, + IN EFI_USB_DATA_DIRECTION TransferDirection, + IN OUT VOID *Data, + IN OUT UINTN *DataLength, + IN UINTN TimeOut, + IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator, + OUT UINT32 *TransferResult + ) +{ + DWUSB_OTGHC_DEV *DwHc; + EFI_STATUS Status; + UINT32 Pid; + UINTN Length; + EFI_USB_DATA_DIRECTION StatusDirection; + UINT32 Direction; + EFI_EVENT TimeoutEvt = NULL; + + if ((Request == NULL) || (TransferResult == NULL)) { + return EFI_INVALID_PARAMETER; + } + + if ((TransferDirection != EfiUsbDataIn) && + (TransferDirection != EfiUsbDataOut) && + (TransferDirection != EfiUsbNoData)) { + return EFI_INVALID_PARAMETER; + } + + if ((TransferDirection == EfiUsbNoData) && + ((Data != NULL) || (*DataLength != 0))) { + return EFI_INVALID_PARAMETER; + } + + if ((TransferDirection != EfiUsbNoData) && + ((Data == NULL) || (*DataLength == 0))) { + return EFI_INVALID_PARAMETER; + } + + if ((MaximumPacketLength != 8) && (MaximumPacketLength != 16) && + (MaximumPacketLength != 32) && (MaximumPacketLength != 64)) { + return EFI_INVALID_PARAMETER; + } + + if ((DeviceSpeed == EFI_USB_SPEED_LOW) && (MaximumPacketLength != 8)) { + return EFI_INVALID_PARAMETER; + } + + DwHc = DWHC_FROM_THIS (This); + + Status = gBS->CreateEvent (EVT_TIMER, 0, NULL, NULL, &TimeoutEvt); + ASSERT_EFI_ERROR (Status); + if (EFI_ERROR (Status)) { + goto Exit; + } + + Status = gBS->SetTimer (TimeoutEvt, TimerForTransfer, + EFI_TIMER_PERIOD_MILLISECONDS (TimeOut)); + ASSERT_EFI_ERROR (Status); + if (EFI_ERROR (Status)) { + goto Exit; + } + + Pid = DWC2_HC_PID_SETUP; + Length = 8; + Status = DwHcTransfer (DwHc, TimeoutEvt, + DWC2_HC_CHANNEL, Translator, DeviceSpeed, + DeviceAddress, MaximumPacketLength, &Pid, 0, + Request, &Length, 0, DWC2_HCCHAR_EPTYPE_CONTROL, + TransferResult, 1); + + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "Setup Stage Error for device 0x%x: 0x%x\n", + DeviceAddress, *TransferResult)); + goto Exit; + } + + if (Data) { + Pid = DWC2_HC_PID_DATA1; + + if (TransferDirection == EfiUsbDataIn) { + Direction = 1; + } else { + Direction = 0; + } + + Status = DwHcTransfer (DwHc, TimeoutEvt, + DWC2_HC_CHANNEL, Translator, DeviceSpeed, + DeviceAddress, MaximumPacketLength, &Pid, + Direction, Data, DataLength, 0, + DWC2_HCCHAR_EPTYPE_CONTROL, + TransferResult, 0); + + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "Data Stage Error for device 0x%x: 0x%x\n", + DeviceAddress, *TransferResult)); + goto Exit; + } + } + + if ((TransferDirection == EfiUsbDataOut) || + (TransferDirection == EfiUsbNoData)) { + StatusDirection = 1; + } else { + StatusDirection = 0; + } + + Pid = DWC2_HC_PID_DATA1; + Length = 0; + Status = DwHcTransfer (DwHc, TimeoutEvt, + DWC2_HC_CHANNEL, Translator, DeviceSpeed, + DeviceAddress, MaximumPacketLength, &Pid, + StatusDirection, DwHc->StatusBuffer, &Length, 0, + DWC2_HCCHAR_EPTYPE_CONTROL, TransferResult, 1); + + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "Status Stage Error for 0x%x: 0x%x\n", + DeviceAddress, *TransferResult)); + goto Exit; + } + +Exit: + if (TimeoutEvt != NULL) { + gBS->CloseEvent (TimeoutEvt); + } + + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "RequestType 0x%x\n", Request->RequestType)); + DEBUG ((DEBUG_ERROR, "Request 0x%x\n", Request->Request)); + DEBUG ((DEBUG_ERROR, "Value 0x%x\n", Request->Value)); + DEBUG ((DEBUG_ERROR, "Index 0x%x\n", Request->Index)); + DEBUG ((DEBUG_ERROR, "Length 0x%x\n", Request->Length)); + } + return Status; +} + +EFI_STATUS +EFIAPI +DwHcBulkTransfer ( + IN EFI_USB2_HC_PROTOCOL *This, + IN UINT8 DeviceAddress, + IN UINT8 EndPointAddress, + IN UINT8 DeviceSpeed, + IN UINTN MaximumPacketLength, + IN UINT8 DataBuffersNumber, + IN OUT VOID *Data[EFI_USB_MAX_BULK_BUFFER_NUM], + IN OUT UINTN *DataLength, + IN OUT UINT8 *DataToggle, + IN UINTN TimeOut, + IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator, + OUT UINT32 *TransferResult + ) +{ + DWUSB_OTGHC_DEV *DwHc; + EFI_STATUS Status; + UINT8 TransferDirection; + UINT8 EpAddress; + UINT32 Pid; + EFI_EVENT TimeoutEvt = NULL; + + if ((Data == NULL) || (Data[0] == NULL) || + (DataLength == NULL) || (*DataLength == 0) || + (TransferResult == NULL)) { + return EFI_INVALID_PARAMETER; + } + + if ((*DataToggle != 0) && (*DataToggle != 1)) { + return EFI_INVALID_PARAMETER; + } + + if ((DeviceSpeed == EFI_USB_SPEED_LOW) || + (DeviceSpeed == EFI_USB_SPEED_SUPER)) { + return EFI_INVALID_PARAMETER; + } + + if (((DeviceSpeed == EFI_USB_SPEED_FULL) && (MaximumPacketLength > 64)) || + ((DeviceSpeed == EFI_USB_SPEED_HIGH) && (MaximumPacketLength > 512))) + return EFI_INVALID_PARAMETER; + + DwHc = DWHC_FROM_THIS (This); + + Status = gBS->CreateEvent (EVT_TIMER, 0, NULL, NULL, &TimeoutEvt); + ASSERT_EFI_ERROR (Status); + if (EFI_ERROR (Status)) { + goto Exit; + } + + Status = gBS->SetTimer (TimeoutEvt, TimerForTransfer, + EFI_TIMER_PERIOD_MILLISECONDS (TimeOut)); + ASSERT_EFI_ERROR (Status); + if (EFI_ERROR (Status)) { + goto Exit; + } + + Status = EFI_DEVICE_ERROR; + TransferDirection = (EndPointAddress >> 7) & 0x01; + EpAddress = EndPointAddress & 0x0F; + Pid = (*DataToggle << 1); + + Status = DwHcTransfer (DwHc, TimeoutEvt, + DWC2_HC_CHANNEL_BULK, Translator, DeviceSpeed, + DeviceAddress, MaximumPacketLength, &Pid, + TransferDirection, Data[0], DataLength, EpAddress, + DWC2_HCCHAR_EPTYPE_BULK, TransferResult, 1); + + *DataToggle = (Pid >> 1); + +Exit: + if (TimeoutEvt != NULL) { + gBS->CloseEvent (TimeoutEvt); + } + + return Status; +} + +EFI_STATUS +EFIAPI +DwHcAsyncInterruptTransfer ( + IN EFI_USB2_HC_PROTOCOL *This, + IN UINT8 DeviceAddress, + IN UINT8 EndPointAddress, + IN UINT8 DeviceSpeed, + IN UINTN MaximumPacketLength, + IN BOOLEAN IsNewTransfer, + IN OUT UINT8 *DataToggle, + IN UINTN PollingInterval, + IN UINTN DataLength, + IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator, + IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallbackFunction, + IN VOID *Context OPTIONAL + ) +{ + DWUSB_OTGHC_DEV *DwHc; + EFI_STATUS Status; + EFI_TPL PreviousTpl; + VOID *Data = NULL; + DWUSB_DEFERRED_REQ *FoundReq = NULL; + DWUSB_DEFERRED_REQ *NewReq = NULL; + + if (!(EndPointAddress & USB_ENDPOINT_DIR_IN)) { + return EFI_INVALID_PARAMETER; + } + + DwHc = DWHC_FROM_THIS (This); + + PreviousTpl = gBS->RaiseTPL (TPL_NOTIFY); + FoundReq = DwHcFindDeferredTransfer (DwHc, DeviceAddress, EndPointAddress); + + if (IsNewTransfer) { + if (FoundReq != NULL) { + Status = EFI_INVALID_PARAMETER; + goto Done; + } + + if (DataLength == 0) { + Status = EFI_INVALID_PARAMETER; + goto Done; + } + + if ((*DataToggle != 1) && (*DataToggle != 0)) { + Status = EFI_INVALID_PARAMETER; + goto Done; + } + + if ((PollingInterval > 255) || (PollingInterval < 1)) { + Status = EFI_INVALID_PARAMETER; + goto Done; + } + + if (CallbackFunction == NULL) { + Status = EFI_INVALID_PARAMETER; + goto Done; + } + } + + if (!IsNewTransfer) { + if (FoundReq == NULL) { + DEBUG ((DEBUG_ERROR, "%u:%u> transfer not found\n", DeviceAddress, EndPointAddress & 0xF)); + Status = EFI_INVALID_PARAMETER; + goto Done; + } + + *DataToggle = FoundReq->Pid >> 1; + FreePool (FoundReq->Data); + + RemoveEntryList (&FoundReq->List); + FreePool (FoundReq); + + Status = EFI_SUCCESS; + goto Done; + } + + NewReq = AllocateZeroPool (sizeof *NewReq); + if (NewReq == NULL) { + DEBUG ((DEBUG_ERROR, "DwHcAsyncInterruptTransfer: failed to allocate req")); + Status = EFI_OUT_OF_RESOURCES; + goto Done; + } + + Data = AllocateZeroPool (DataLength); + if (Data == NULL) { + DEBUG ((DEBUG_ERROR, "DwHcAsyncInterruptTransfer: failed to allocate buffer\n")); + Status = EFI_OUT_OF_RESOURCES; + goto Done; + } + + InitializeListHead (&NewReq->List); + + NewReq->FrameInterval = PollingInterval; + NewReq->TargetFrame = DwHc->CurrentFrame + + NewReq->FrameInterval; + + NewReq->DwHc = DwHc; + NewReq->Channel = DWC2_HC_CHANNEL_ASYNC; + NewReq->Translator = Translator; + NewReq->DeviceSpeed = DeviceSpeed; + NewReq->DeviceAddress = DeviceAddress; + NewReq->MaximumPacketLength = MaximumPacketLength; + NewReq->TransferDirection = (EndPointAddress >> 7) & 0x01; + NewReq->Data = Data; + NewReq->DataLength = DataLength; + NewReq->Pid = *DataToggle << 1; + NewReq->EpAddress = EndPointAddress & 0x0F; + NewReq->EpType = DWC2_HCCHAR_EPTYPE_INTR; + NewReq->IgnoreAck = FALSE; + NewReq->CallbackFunction = CallbackFunction; + NewReq->CallbackContext = Context; + NewReq->TimeOut = 1000; /* 1000 ms */ + + InsertTailList (&DwHc->DeferredList, &NewReq->List); + Status = EFI_SUCCESS; + +Done: + gBS->RestoreTPL (PreviousTpl); + + if (Status != EFI_SUCCESS) { + if (Data != NULL) { + FreePool (Data); + } + + if (NewReq != NULL) { + FreePool (NewReq); + } + } + + return Status; +} + +EFI_STATUS +EFIAPI +DwHcSyncInterruptTransfer ( + IN EFI_USB2_HC_PROTOCOL *This, + IN UINT8 DeviceAddress, + IN UINT8 EndPointAddress, + IN UINT8 DeviceSpeed, + IN UINTN MaximumPacketLength, + IN OUT VOID *Data, + IN OUT UINTN *DataLength, + IN OUT UINT8 *DataToggle, + IN UINTN TimeOut, + IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator, + OUT UINT32 *TransferResult + ) +{ + DWUSB_OTGHC_DEV *DwHc; + EFI_STATUS Status; + EFI_EVENT TimeoutEvt; + UINT8 TransferDirection; + UINT8 EpAddress; + UINT32 Pid; + + DwHc = DWHC_FROM_THIS (This); + + if (Data == NULL || + DataLength == NULL || + DataToggle == NULL || + TransferResult == NULL) { + return EFI_INVALID_PARAMETER; + } + + if (*DataLength == 0) { + return EFI_INVALID_PARAMETER; + } + + if ((*DataToggle != 0) && (*DataToggle != 1)) { + return EFI_INVALID_PARAMETER; + } + + Status = gBS->CreateEvent (EVT_TIMER, 0, NULL, NULL, &TimeoutEvt); + if (EFI_ERROR (Status)) { + return Status; + } + + Status = gBS->SetTimer (TimeoutEvt, TimerForTransfer, + EFI_TIMER_PERIOD_MILLISECONDS (TimeOut)); + if (EFI_ERROR (Status)) { + goto Exit; + } + + TransferDirection = (EndPointAddress >> 7) & 0x01; + EpAddress = EndPointAddress & 0x0F; + Pid = (*DataToggle << 1); + Status = DwHcTransfer (DwHc, TimeoutEvt, + DWC2_HC_CHANNEL_SYNC, Translator, + DeviceSpeed, DeviceAddress, + MaximumPacketLength, + &Pid, TransferDirection, Data, + DataLength, EpAddress, + DWC2_HCCHAR_EPTYPE_INTR, + TransferResult, 0); + *DataToggle = (Pid >> 1); + +Exit: + if (TimeoutEvt != NULL) { + gBS->CloseEvent (TimeoutEvt); + } + return Status; +} + +EFI_STATUS +EFIAPI +DwHcIsochronousTransfer ( + IN EFI_USB2_HC_PROTOCOL *This, + IN UINT8 DeviceAddress, + IN UINT8 EndPointAddress, + IN UINT8 DeviceSpeed, + IN UINTN MaximumPacketLength, + IN UINT8 DataBuffersNumber, + IN OUT VOID *Data[EFI_USB_MAX_ISO_BUFFER_NUM], + IN UINTN DataLength, + IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator, + OUT UINT32 *TransferResult + ) +{ + DEBUG ((DEBUG_ERROR, "Iso\n")); + return EFI_UNSUPPORTED; +} + +EFI_STATUS +EFIAPI +DwHcAsyncIsochronousTransfer ( + IN EFI_USB2_HC_PROTOCOL *This, + IN UINT8 DeviceAddress, + IN UINT8 EndPointAddress, + IN UINT8 DeviceSpeed, + IN UINTN MaximumPacketLength, + IN UINT8 DataBuffersNumber, + IN OUT VOID *Data[EFI_USB_MAX_ISO_BUFFER_NUM], + IN UINTN DataLength, + IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator, + IN EFI_ASYNC_USB_TRANSFER_CALLBACK IsochronousCallBack, + IN VOID *Context + ) +{ + DEBUG ((DEBUG_ERROR, "AsyncIso\n")); + return EFI_UNSUPPORTED; +} + +/** + Supported Functions +**/ + +VOID +InitFslspClkSel ( + IN DWUSB_OTGHC_DEV *DwHc + ) +{ + UINT32 PhyClk; + + PhyClk = DWC2_HCFG_FSLSPCLKSEL_30_60_MHZ; + + MmioAndThenOr32 (DwHc->DwUsbBase + HCFG, + ~DWC2_HCFG_FSLSPCLKSEL_MASK, + PhyClk << DWC2_HCFG_FSLSPCLKSEL_OFFSET); +} + +VOID +DwFlushTxFifo ( + IN DWUSB_OTGHC_DEV *DwHc, + IN EFI_EVENT Timeout, + IN INT32 Num + ) +{ + UINT32 Status; + + MmioWrite32 (DwHc->DwUsbBase + GRSTCTL, DWC2_GRSTCTL_TXFFLSH | + (Num << DWC2_GRSTCTL_TXFNUM_OFFSET)); + + Status = Wait4Bit (Timeout, DwHc->DwUsbBase + GRSTCTL, DWC2_GRSTCTL_TXFFLSH, 0); + if (Status) + DEBUG ((DEBUG_ERROR, "DwFlushTxFifo: Timeout!\n")); + + MicroSecondDelay (1); +} + +VOID +DwFlushRxFifo ( + IN DWUSB_OTGHC_DEV *DwHc, + IN EFI_EVENT Timeout + ) +{ + UINT32 Status; + + MmioWrite32 (DwHc->DwUsbBase + GRSTCTL, DWC2_GRSTCTL_RXFFLSH); + + Status = Wait4Bit (Timeout, DwHc->DwUsbBase + GRSTCTL, DWC2_GRSTCTL_RXFFLSH, 0); + if (Status) + DEBUG ((DEBUG_ERROR, "DwFlushRxFifo: Timeout!\n")); + + MicroSecondDelay (1); +} + +EFI_STATUS +DwHcInit ( + IN DWUSB_OTGHC_DEV *DwHc, + IN EFI_EVENT Timeout + ) +{ + UINT32 NpTxFifoSz = 0; + UINT32 pTxFifoSz = 0; + UINT32 Hprt0 = 0; + INT32 i, Status, NumChannels; + + MmioWrite32 (DwHc->DwUsbBase + PCGCCTL, 0); + + InitFslspClkSel (DwHc); + + MmioWrite32 (DwHc->DwUsbBase + GRXFSIZ, DWC2_HOST_RX_FIFO_SIZE); + + NpTxFifoSz |= DWC2_HOST_NPERIO_TX_FIFO_SIZE << DWC2_FIFOSIZE_DEPTH_OFFSET; + NpTxFifoSz |= DWC2_HOST_RX_FIFO_SIZE << DWC2_FIFOSIZE_STARTADDR_OFFSET; + MmioWrite32 (DwHc->DwUsbBase + GNPTXFSIZ, NpTxFifoSz); + + pTxFifoSz |= DWC2_HOST_PERIO_TX_FIFO_SIZE << DWC2_FIFOSIZE_DEPTH_OFFSET; + pTxFifoSz |= (DWC2_HOST_RX_FIFO_SIZE + DWC2_HOST_NPERIO_TX_FIFO_SIZE) << + DWC2_FIFOSIZE_STARTADDR_OFFSET; + MmioWrite32 (DwHc->DwUsbBase + HPTXFSIZ, pTxFifoSz); + + MmioAnd32 (DwHc->DwUsbBase + GOTGCTL, ~(DWC2_GOTGCTL_HSTSETHNPEN)); + + DwFlushTxFifo (DwHc, Timeout, 0x10); + DwFlushRxFifo (DwHc, Timeout); + + NumChannels = MmioRead32 (DwHc->DwUsbBase + GHWCFG2); + NumChannels &= DWC2_HWCFG2_NUM_HOST_CHAN_MASK; + NumChannels >>= DWC2_HWCFG2_NUM_HOST_CHAN_OFFSET; + NumChannels += 1; + DEBUG ((DEBUG_INFO, "Host has %u channels\n", NumChannels)); + + for (i = 0; i < NumChannels; i++) + MmioAndThenOr32 (DwHc->DwUsbBase + HCCHAR (i), + ~(DWC2_HCCHAR_CHEN | DWC2_HCCHAR_EPDIR), + DWC2_HCCHAR_CHDIS); + + for (i = 0; i < NumChannels; i++) { + MmioAndThenOr32 (DwHc->DwUsbBase + HCCHAR (i), + ~DWC2_HCCHAR_EPDIR, + (DWC2_HCCHAR_CHEN | DWC2_HCCHAR_CHDIS)); + Status = Wait4Bit (Timeout, DwHc->DwUsbBase + HCCHAR (i), DWC2_HCCHAR_CHEN, 0); + if (Status) { + DEBUG ((DEBUG_ERROR, "DwHcInit: Timeout!\n")); + return Status; + } + } + + if (MmioRead32 (DwHc->DwUsbBase + GINTSTS) & DWC2_GINTSTS_CURMODE_HOST) { + Hprt0 = MmioRead32 (DwHc->DwUsbBase + HPRT0); + Hprt0 &= ~(DWC2_HPRT0_PRTENA | DWC2_HPRT0_PRTCONNDET); + Hprt0 &= ~(DWC2_HPRT0_PRTENCHNG | DWC2_HPRT0_PRTOVRCURRCHNG); + + if (!(Hprt0 & DWC2_HPRT0_PRTPWR)) { + Hprt0 |= DWC2_HPRT0_PRTPWR; + MmioWrite32 (DwHc->DwUsbBase + HPRT0, Hprt0); + } + } + + return EFI_SUCCESS; +} + +EFI_STATUS +DwCoreInit ( + IN DWUSB_OTGHC_DEV *DwHc, + IN EFI_EVENT Timeout + ) +{ + UINT32 AhbCfg = 0; + UINT32 UsbCfg = 0; + EFI_STATUS Status; + + UsbCfg = MmioRead32 (DwHc->DwUsbBase + GUSBCFG); + + UsbCfg |= DWC2_GUSBCFG_ULPI_EXT_VBUS_DRV; + UsbCfg &= ~DWC2_GUSBCFG_TERM_SEL_DL_PULSE; + + MmioWrite32 (DwHc->DwUsbBase + GUSBCFG, UsbCfg); + + Status = DwCoreReset (DwHc, Timeout); + if (Status != EFI_SUCCESS) { + DEBUG ((DEBUG_ERROR, "DwCoreReset failed\n")); + return Status; + } + + UsbCfg &= ~(DWC2_GUSBCFG_ULPI_UTMI_SEL | DWC2_GUSBCFG_PHYIF); + UsbCfg |= CONFIG_DWC2_PHY_TYPE << DWC2_GUSBCFG_ULPI_UTMI_SEL_OFFSET; + UsbCfg &= ~DWC2_GUSBCFG_DDRSEL; + + MmioWrite32 (DwHc->DwUsbBase + GUSBCFG, UsbCfg); + + Status = DwCoreReset (DwHc, Timeout); + if (Status != EFI_SUCCESS) { + DEBUG ((DEBUG_ERROR, "DwCoreReset 2 failed\n")); + return Status; + } + + UsbCfg = MmioRead32 (DwHc->DwUsbBase + GUSBCFG); + + UsbCfg &= ~(DWC2_GUSBCFG_ULPI_FSLS | DWC2_GUSBCFG_ULPI_CLK_SUS_M); + MmioWrite32 (DwHc->DwUsbBase + GUSBCFG, UsbCfg); + + AhbCfg &= ~DWC2_GAHBCFG_AXI_BURST4_MASK; + AhbCfg |= DWC2_GAHBCFG_DMAENABLE | DWC2_GAHBCFG_WAIT_AXI_WRITES; + + MmioWrite32 (DwHc->DwUsbBase + GAHBCFG, AhbCfg); + MmioAnd32 (DwHc->DwUsbBase + GUSBCFG, ~(DWC2_GUSBCFG_HNPCAP | DWC2_GUSBCFG_SRPCAP)); + + return EFI_SUCCESS; +} + +VOID +DestroyDwUsbHc ( + IN DWUSB_OTGHC_DEV *DwHc + ) +{ + UINT32 Pages; + EFI_TPL PreviousTpl; + + if (DwHc == NULL) { + return; + } + + if (DwHc->PeriodicEvent != NULL) { + PreviousTpl = gBS->RaiseTPL (TPL_NOTIFY); + gBS->CloseEvent (DwHc->PeriodicEvent); + gBS->RestoreTPL (PreviousTpl); + } + + if (DwHc->ExitBootServiceEvent != NULL) { + gBS->CloseEvent (DwHc->ExitBootServiceEvent); + } + + Pages = EFI_SIZE_TO_PAGES (DWC2_DATA_BUF_SIZE); + DmaUnmap (DwHc->AlignedBufferMapping); + DmaFreeBuffer (Pages, DwHc->AlignedBuffer); + + Pages = EFI_SIZE_TO_PAGES (DWC2_STATUS_BUF_SIZE); + FreePages (DwHc->StatusBuffer, Pages); + + gBS->FreePool (DwHc); +} + +STATIC +VOID +EFIAPI +DwUsbHcExitBootService ( + IN EFI_EVENT Event, + IN VOID *Context + ) +{ + DWUSB_OTGHC_DEV *DwHc; + + DwHc = (DWUSB_OTGHC_DEV*)Context; + DwHcQuiesce (DwHc); +} + +STATIC +UINT32 +FramesPassed ( + IN DWUSB_OTGHC_DEV *DwHc + ) +{ + UINT32 MicroFrameStart = DwHc->LastMicroFrame; + UINT32 MicroFrameEnd = + MmioRead32 (DwHc->DwUsbBase + HFNUM) & + DWC2_HFNUM_FRNUM_MASK; + UINT32 MicroFramesPassed; + + DwHc->LastMicroFrame = (UINT16)MicroFrameEnd; + + if (MicroFrameEnd < MicroFrameStart) { + /* + * Being delayed by 0x8000 microframes is 262 seconds. + * Unlikely. Also, we can't really do better unless we + * start polling time (which is tedious in EFI...). + */ + MicroFrameEnd += DWC2_HFNUM_FRNUM_MASK + 1; + } + + MicroFramesPassed = MicroFrameEnd - MicroFrameStart; + + /* + * Round up. We're supposedly getting called every + * 8 microframes anyway. This means we'll end up + * going a bit faster, which is okay. + */ + return ALIGN_VALUE (MicroFramesPassed, 8) / 8; +} + +STATIC +VOID +DwHcPeriodicHandler ( + IN EFI_EVENT Event, + IN VOID *Context + ) +{ + UINT32 Frame; + LIST_ENTRY *Entry; + LIST_ENTRY *NextEntry; + DWUSB_OTGHC_DEV *DwHc = Context; + + DwHc->CurrentFrame += FramesPassed (DwHc); + Frame = DwHc->CurrentFrame; + + EFI_LIST_FOR_EACH_SAFE (Entry, NextEntry, + &DwHc->DeferredList) { + DWUSB_DEFERRED_REQ *Req = EFI_LIST_CONTAINER (Entry, DWUSB_DEFERRED_REQ, List); + + if (Frame >= Req->TargetFrame) { + Req->TargetFrame = Frame + Req->FrameInterval; + DwHcDeferredTransfer (Req); + } + } +} + +EFI_STATUS +CreateDwUsbHc ( + OUT DWUSB_OTGHC_DEV **OutDwHc + ) +{ + DWUSB_OTGHC_DEV *DwHc; + UINT32 Pages; + UINTN BufferSize; + EFI_STATUS Status; + + DwHc = AllocateZeroPool (sizeof (DWUSB_OTGHC_DEV)); + if (DwHc == NULL) { + return EFI_OUT_OF_RESOURCES; + } + + DwHc->Signature = DWUSB_OTGHC_DEV_SIGNATURE; + DwHc->DwUsbOtgHc.GetCapability = DwHcGetCapability; + DwHc->DwUsbOtgHc.Reset = DwHcReset; + DwHc->DwUsbOtgHc.GetState = DwHcGetState; + DwHc->DwUsbOtgHc.SetState = DwHcSetState; + DwHc->DwUsbOtgHc.ControlTransfer = DwHcControlTransfer; + DwHc->DwUsbOtgHc.BulkTransfer = DwHcBulkTransfer; + DwHc->DwUsbOtgHc.AsyncInterruptTransfer = DwHcAsyncInterruptTransfer; + DwHc->DwUsbOtgHc.SyncInterruptTransfer = DwHcSyncInterruptTransfer; + DwHc->DwUsbOtgHc.IsochronousTransfer = DwHcIsochronousTransfer; + DwHc->DwUsbOtgHc.AsyncIsochronousTransfer = DwHcAsyncIsochronousTransfer; + DwHc->DwUsbOtgHc.GetRootHubPortStatus = DwHcGetRootHubPortStatus; + DwHc->DwUsbOtgHc.SetRootHubPortFeature = DwHcSetRootHubPortFeature; + DwHc->DwUsbOtgHc.ClearRootHubPortFeature = DwHcClearRootHubPortFeature; + DwHc->DwUsbOtgHc.MajorRevision = 0x02; + DwHc->DwUsbOtgHc.MinorRevision = 0x00; + DwHc->DwUsbBase = DW2_USB_BASE_ADDRESS; + + Pages = EFI_SIZE_TO_PAGES (DWC2_STATUS_BUF_SIZE); + DwHc->StatusBuffer = AllocatePages (Pages); + if (DwHc->StatusBuffer == NULL) { + DEBUG ((DEBUG_ERROR, "CreateDwUsbHc: No pages available for StatusBuffer\n")); + return EFI_OUT_OF_RESOURCES; + } + + Pages = EFI_SIZE_TO_PAGES (DWC2_DATA_BUF_SIZE); + Status = DmaAllocateBuffer (EfiBootServicesData, Pages, (VOID**)&DwHc->AlignedBuffer); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "CreateDwUsbHc: DmaAllocateBuffer: %r\n", Status)); + return Status; + } + + BufferSize = EFI_PAGES_TO_SIZE (Pages); + Status = DmaMap (MapOperationBusMasterCommonBuffer, DwHc->AlignedBuffer, &BufferSize, + &DwHc->AlignedBufferBusAddress, &DwHc->AlignedBufferMapping); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "CreateDwUsbHc: DmaMap: %r\n", Status)); + return Status; + } + + InitializeListHead (&DwHc->DeferredList); + + Status = gBS->CreateEventEx ( + EVT_NOTIFY_SIGNAL, + TPL_NOTIFY, + DwUsbHcExitBootService, + DwHc, + &gEfiEventExitBootServicesGuid, + &DwHc->ExitBootServiceEvent + ); + + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "CreateDwUsbHc: DwUsbHcExitBootService: %r\n", Status)); + return Status; + } + + Status = gBS->CreateEvent ( + EVT_TIMER | EVT_NOTIFY_SIGNAL, + TPL_NOTIFY, + DwHcPeriodicHandler, + DwHc, &DwHc->PeriodicEvent + ); + if (Status != EFI_SUCCESS) { + DEBUG ((DEBUG_ERROR, "CreateDwUsbHc: DwHcPeriodicHandler: %r\n", Status)); + return Status; + } + + Status = gBS->SetTimer (DwHc->PeriodicEvent, TimerPeriodic, + EFI_TIMER_PERIOD_MILLISECONDS (1)); + if (Status != EFI_SUCCESS) { + DEBUG ((DEBUG_ERROR, "CreateDwUsbHc: PeriodicEvent: %r\n", Status)); + return Status; + } + + *OutDwHc = DwHc; + return EFI_SUCCESS; +} + +VOID +DwHcQuiesce ( + IN DWUSB_OTGHC_DEV *DwHc + ) +{ + if (DwHc->PeriodicEvent != NULL) { + EFI_TPL PreviousTpl; + PreviousTpl = gBS->RaiseTPL (TPL_NOTIFY); + gBS->CloseEvent (DwHc->PeriodicEvent); + DwHc->PeriodicEvent = NULL; + gBS->RestoreTPL (PreviousTpl); + } + + MmioAndThenOr32 (DwHc->DwUsbBase + HPRT0, + ~(DWC2_HPRT0_PRTENA | DWC2_HPRT0_PRTCONNDET | + DWC2_HPRT0_PRTENCHNG | DWC2_HPRT0_PRTOVRCURRCHNG), + DWC2_HPRT0_PRTRST); + + MicroSecondDelay (50000); + + MmioWrite32 (DwHc->DwUsbBase + GRSTCTL, DWC2_GRSTCTL_CSFTRST); + MicroSecondDelay (100000); +} diff --git a/Platform/Raspberry/Pi3/Drivers/DwUsbHostDxe/DwUsbHostDxe.h b/Platform/Raspberry/Pi3/Drivers/DwUsbHostDxe/DwUsbHostDxe.h new file mode 100644 index 000000000000..535abd2336a1 --- /dev/null +++ b/Platform/Raspberry/Pi3/Drivers/DwUsbHostDxe/DwUsbHostDxe.h @@ -0,0 +1,165 @@ +/** @file + * + * Copyright (c) 2017-2018, Andrey Warkentin <andrey.warken...@gmail.com> + * Copyright (c) 2015-2016, Linaro Limited. All rights reserved. + * Copyright (c) 2014 Marek Vasut <ma...@denx.de> + * Copyright (c) 2012 Oleksandr Tymoshenko <go...@freebsd.org> + * + * + * This program and the accompanying materials + * are licensed and made available under the terms and conditions of the BSD License + * which accompanies this distribution. The full text of the license may be found at + * http://opensource.org/licenses/bsd-license.php + * + * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + * + **/ + +#ifndef __DWUSBHOSTDXE_H__ +#define __DWUSBHOSTDXE_H__ + +#include <Uefi.h> + +#include <IndustryStandard/Bcm2836.h> +#include <IndustryStandard/RpiMbox.h> +#include <Protocol/Usb2HostController.h> +#include <Protocol/RpiFirmware.h> + +#include <Guid/EventGroup.h> + +#include <Library/DebugLib.h> +#include <Library/BaseMemoryLib.h> +#include <Library/UefiDriverEntryPoint.h> +#include <Library/UefiBootServicesTableLib.h> +#include <Library/UefiLib.h> +#include <Library/BaseLib.h> +#include <Library/MemoryAllocationLib.h> +#include <Library/PcdLib.h> +#include <Library/ReportStatusCodeLib.h> +#include <Library/DevicePathLib.h> +#include <Library/PcdLib.h> +#include <Library/IoLib.h> +#include <Library/TimerLib.h> +#include <Library/DmaLib.h> +#include <Library/ArmLib.h> + +#define MAX_DEVICE 16 +#define MAX_ENDPOINT 16 + +#define DWUSB_OTGHC_DEV_SIGNATURE SIGNATURE_32 ('d', 'w', 'h', 'c') +#define DWHC_FROM_THIS(a) CR(a, DWUSB_OTGHC_DEV, DwUsbOtgHc, DWUSB_OTGHC_DEV_SIGNATURE) + +// +// Iterate through the double linked list. NOT delete safe +// +#define EFI_LIST_FOR_EACH(Entry, ListHead) \ + for(Entry = (ListHead)->ForwardLink; Entry != (ListHead); Entry = Entry->ForwardLink) + +// +// Iterate through the double linked list. This is delete-safe. +// Do not touch NextEntry +// +#define EFI_LIST_FOR_EACH_SAFE(Entry, NextEntry, ListHead) \ + for(Entry = (ListHead)->ForwardLink, NextEntry = Entry->ForwardLink;\ + Entry != (ListHead); Entry = NextEntry, NextEntry = Entry->ForwardLink) + +#define EFI_LIST_CONTAINER(Entry, Type, Field) BASE_CR(Entry, Type, Field) + +// +// The RequestType in EFI_USB_DEVICE_REQUEST is composed of +// three fields: One bit direction, 2 bit type, and 5 bit +// target. +// +#define USB_REQUEST_TYPE(Dir, Type, Target) \ + ((UINT8)((((Dir) == EfiUsbDataIn ? 0x01 : 0) << 7) | (Type) | (Target))) + +typedef struct { + VENDOR_DEVICE_PATH Custom; + EFI_DEVICE_PATH_PROTOCOL EndDevicePath; +} EFI_DW_DEVICE_PATH; + +typedef struct _DWUSB_DEFERRED_REQ { + IN OUT LIST_ENTRY List; + IN struct _DWUSB_OTGHC_DEV *DwHc; + IN UINT32 Channel; + IN UINT32 FrameInterval; + IN UINT32 TargetFrame; + IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator; + IN UINT8 DeviceSpeed; + IN UINT8 DeviceAddress; + IN UINTN MaximumPacketLength; + IN UINT32 TransferDirection; + IN OUT VOID *Data; + IN OUT UINTN DataLength; + IN OUT UINT32 Pid; + IN UINT32 EpAddress; + IN UINT32 EpType; + OUT UINT32 TransferResult; + IN BOOLEAN IgnoreAck; + IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallbackFunction; + IN VOID *CallbackContext; + IN UINTN TimeOut; +} DWUSB_DEFERRED_REQ; + +typedef struct _DWUSB_OTGHC_DEV { + UINTN Signature; + + EFI_USB2_HC_PROTOCOL DwUsbOtgHc; + + EFI_USB_HC_STATE DwHcState; + + EFI_EVENT ExitBootServiceEvent; + + EFI_EVENT PeriodicEvent; + + EFI_PHYSICAL_ADDRESS DwUsbBase; + UINT8 *StatusBuffer; + + UINT8 *AlignedBuffer; + VOID * AlignedBufferMapping; + UINTN AlignedBufferBusAddress; + LIST_ENTRY DeferredList; + /* + * 1ms frames. + */ + UINTN CurrentFrame; + /* + * 125us frames; + */ + UINT16 LastMicroFrame; +} DWUSB_OTGHC_DEV; + +extern EFI_COMPONENT_NAME_PROTOCOL gComponentName; +extern EFI_COMPONENT_NAME2_PROTOCOL gComponentName2; + +EFI_STATUS +CreateDwUsbHc ( + OUT DWUSB_OTGHC_DEV **OutDwHc + ); + +VOID +DestroyDwUsbHc ( + IN DWUSB_OTGHC_DEV *Dev + ); + +EFI_STATUS +EFIAPI +DwHcReset ( + IN EFI_USB2_HC_PROTOCOL *This, + IN UINT16 Attributes + ); + +EFI_STATUS +EFIAPI +DwHcSetState ( + IN EFI_USB2_HC_PROTOCOL *This, + IN EFI_USB_HC_STATE State + ); + +VOID +DwHcQuiesce ( + IN DWUSB_OTGHC_DEV *DwHc + ); + +#endif /* __DWUSBHOSTDXE_H__ */ diff --git a/Platform/Raspberry/Pi3/Drivers/DwUsbHostDxe/DwUsbHostDxe.inf b/Platform/Raspberry/Pi3/Drivers/DwUsbHostDxe/DwUsbHostDxe.inf new file mode 100644 index 000000000000..669979bf2183 --- /dev/null +++ b/Platform/Raspberry/Pi3/Drivers/DwUsbHostDxe/DwUsbHostDxe.inf @@ -0,0 +1,52 @@ +#/** @file +# +# Copyright (c) 2017-2018, Andrei Warkentin <andrey.warken...@gmail.com> +# Copyright (c) 2015-2016, Linaro Limited. All rights reserved. +# +# SPDX-License-Identifier: GPL-2.0+ +# +#**/ + +[Defines] + INF_VERSION = 0x0001001A + BASE_NAME = DwUsbHostDxe + FILE_GUID = 4bf1704c-03f4-46d5-bca6-82fa580badfd + MODULE_TYPE = UEFI_DRIVER + VERSION_STRING = 1.0 + ENTRY_POINT = DwUsbHostEntryPoint + +[Sources.common] + DwUsbHostDxe.c + DriverBinding.c + ComponentName.c + +[Packages] + ArmPkg/ArmPkg.dec + MdePkg/MdePkg.dec + EmbeddedPkg/EmbeddedPkg.dec + MdeModulePkg/MdeModulePkg.dec + Platform/Raspberry/Pi3/RPi3.dec + +[LibraryClasses] + MemoryAllocationLib + BaseLib + UefiLib + UefiBootServicesTableLib + UefiDriverEntryPoint + BaseMemoryLib + DebugLib + ReportStatusCodeLib + TimerLib + DmaLib + IoLib + +[Guids] + gEfiEventExitBootServicesGuid + +[Protocols] + gEfiDriverBindingProtocolGuid + gEfiUsb2HcProtocolGuid + gRaspberryPiFirmwareProtocolGuid + +[Depex] + gRaspberryPiFirmwareProtocolGuid diff --git a/Platform/Raspberry/Pi3/Drivers/DwUsbHostDxe/DwcHw.h b/Platform/Raspberry/Pi3/Drivers/DwUsbHostDxe/DwcHw.h new file mode 100644 index 000000000000..e95fab7514ab --- /dev/null +++ b/Platform/Raspberry/Pi3/Drivers/DwUsbHostDxe/DwcHw.h @@ -0,0 +1,791 @@ +/** @file + * + * Copyright (c) 2017, Andrey Warkentin <andrey.warken...@gmail.com> + * Copyright (c) 2015-2016, Linaro Limited. All rights reserved. + * Copyright (c) 2014 Marek Vasut <ma...@denx.de> + * Copyright (c) 2012 Oleksandr Tymoshenko <go...@freebsd.org> + * + * + * This program and the accompanying materials + * are licensed and made available under the terms and conditions of the BSD License + * which accompanies this distribution. The full text of the license may be found at + * http://opensource.org/licenses/bsd-license.php + * + * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + * + **/ + +#ifndef __DWCHW_H__ +#define __DWCHW_H__ + +#define DW2_USB_BASE_ADDRESS 0x3f980000 + +#define HSOTG_REG(x) (x) + +#define HCCHAR(_ch) HSOTG_REG(0x0500 + 0x20 * (_ch)) +#define HCSPLT(_ch) HSOTG_REG(0x0504 + 0x20 * (_ch)) +#define HCINT(_ch) HSOTG_REG(0x0508 + 0x20 * (_ch)) +#define HCINTMSK(_ch) HSOTG_REG(0x050c + 0x20 * (_ch)) +#define HCTSIZ(_ch) HSOTG_REG(0x0510 + 0x20 * (_ch)) +#define HCDMA(_ch) HSOTG_REG(0x0514 + 0x20 * (_ch)) +#define HCDMAB(_ch) HSOTG_REG(0x051c + 0x20 * (_ch)) + +#define HCFG HSOTG_REG(0x0400) +#define HFIR HSOTG_REG(0x0404) +#define HFNUM HSOTG_REG(0x0408) +#define HPTXSTS HSOTG_REG(0x0410) +#define HAINT HSOTG_REG(0x0414) +#define HAINTMSK HSOTG_REG(0x0418) +#define HFLBADDR HSOTG_REG(0x041c) + +#define GOTGCTL HSOTG_REG(0x000) // OTG control and status +#define GOTGINT HSOTG_REG(0x004) // OTG interrupt +#define GAHBCFG HSOTG_REG(0x008) // AHB config +#define GUSBCFG HSOTG_REG(0x00C) // Core USB config +#define GRSTCTL HSOTG_REG(0x010) // Core Reset +#define GINTSTS HSOTG_REG(0x014) // Core Interrupt +#define GINTMSK HSOTG_REG(0x018) // Core Interrupt Mask +#define GRXSTSR HSOTG_REG(0x01C) // Receive Status Queue Read +#define GRXSTSP HSOTG_REG(0x020) // Receive Status Queue Read and POP +#define GRXFSIZ HSOTG_REG(0x024) // Receive FIFO Size +#define GNPTXFSIZ HSOTG_REG(0x028) // Non-periodic TX FIFO Size +#define GNPTXSTS HSOTG_REG(0x02C) // Non-periodic TX FIFO/Queue Status +#define GI2CCTL HSOTG_REG(0x0030) // I2C access +#define GPVNDCTL HSOTG_REG(0x0034) // PHY vendor control +#define GGPIO HSOTG_REG(0x0038) // GPIO +#define GUID HSOTG_REG(0x003c) // User ID +#define GSNPSID HSOTG_REG(0x0040) // Synopsis ID +#define GHWCFG1 HSOTG_REG(0x0044) // User HW Config1 +#define GHWCFG2 HSOTG_REG(0x0048) // User HW Config2 +#define GHWCFG3 HSOTG_REG(0x004c) // User HW Config3 +#define GHWCFG4 HSOTG_REG(0x0050) // User HW Config4 +#define GLPMCFG HSOTG_REG(0x0054) // Core LPM config +#define HPTXFSIZ HSOTG_REG(0x100) // Host periodic TX FIFO Size +#define DPTXFSIZN(_a) HSOTG_REG(0x104 + (((_a) - 1) * 4)) +#define HPRT0 HSOTG_REG(0x0440) +#define PCGCCTL HSOTG_REG(0xE00) + +#define DWC2_GOTGCTL_SESREQSCS (1 << 0) +#define DWC2_GOTGCTL_SESREQSCS_OFFSET 0 +#define DWC2_GOTGCTL_SESREQ (1 << 1) +#define DWC2_GOTGCTL_SESREQ_OFFSET 1 +#define DWC2_GOTGCTL_HSTNEGSCS (1 << 8) +#define DWC2_GOTGCTL_HSTNEGSCS_OFFSET 8 +#define DWC2_GOTGCTL_HNPREQ (1 << 9) +#define DWC2_GOTGCTL_HNPREQ_OFFSET 9 +#define DWC2_GOTGCTL_HSTSETHNPEN (1 << 10) +#define DWC2_GOTGCTL_HSTSETHNPEN_OFFSET 10 +#define DWC2_GOTGCTL_DEVHNPEN (1 << 11) +#define DWC2_GOTGCTL_DEVHNPEN_OFFSET 11 +#define DWC2_GOTGCTL_CONIDSTS (1 << 16) +#define DWC2_GOTGCTL_CONIDSTS_OFFSET 16 +#define DWC2_GOTGCTL_DBNCTIME (1 << 17) +#define DWC2_GOTGCTL_DBNCTIME_OFFSET 17 +#define DWC2_GOTGCTL_ASESVLD (1 << 18) +#define DWC2_GOTGCTL_ASESVLD_OFFSET 18 +#define DWC2_GOTGCTL_BSESVLD (1 << 19) +#define DWC2_GOTGCTL_BSESVLD_OFFSET 19 +#define DWC2_GOTGCTL_OTGVER (1 << 20) +#define DWC2_GOTGCTL_OTGVER_OFFSET 20 +#define DWC2_GOTGINT_SESENDDET (1 << 2) +#define DWC2_GOTGINT_SESENDDET_OFFSET 2 +#define DWC2_GOTGINT_SESREQSUCSTSCHNG (1 << 8) +#define DWC2_GOTGINT_SESREQSUCSTSCHNG_OFFSET 8 +#define DWC2_GOTGINT_HSTNEGSUCSTSCHNG (1 << 9) +#define DWC2_GOTGINT_HSTNEGSUCSTSCHNG_OFFSET 9 +#define DWC2_GOTGINT_RESERVER10_16_MASK (0x7F << 10) +#define DWC2_GOTGINT_RESERVER10_16_OFFSET 10 +#define DWC2_GOTGINT_HSTNEGDET (1 << 17) +#define DWC2_GOTGINT_HSTNEGDET_OFFSET 17 +#define DWC2_GOTGINT_ADEVTOUTCHNG (1 << 18) +#define DWC2_GOTGINT_ADEVTOUTCHNG_OFFSET 18 +#define DWC2_GOTGINT_DEBDONE (1 << 19) +#define DWC2_GOTGINT_DEBDONE_OFFSET 19 +#define DWC2_GAHBCFG_GLBLINTRMSK (1 << 0) +#define DWC2_GAHBCFG_GLBLINTRMSK_OFFSET 0 +#define DWC2_GAHBCFG_AXI_BURST4_MASK (3 << 1) +#define DWC2_GAHBCFG_WAIT_AXI_WRITES (1 << 4) +#define DWC2_GAHBCFG_DMAENABLE (1 << 5) +#define DWC2_GAHBCFG_DMAENABLE_OFFSET 5 +#define DWC2_GAHBCFG_NPTXFEMPLVL_TXFEMPLVL (1 << 7) +#define DWC2_GAHBCFG_NPTXFEMPLVL_TXFEMPLVL_OFFSET 7 +#define DWC2_GAHBCFG_PTXFEMPLVL (1 << 8) +#define DWC2_GAHBCFG_PTXFEMPLVL_OFFSET 8 +#define DWC2_GUSBCFG_TOUTCAL_MASK (0x7 << 0) +#define DWC2_GUSBCFG_TOUTCAL_OFFSET 0 +#define DWC2_GUSBCFG_PHYIF (1 << 3) +#define DWC2_GUSBCFG_PHYIF_OFFSET 3 +#define DWC2_GUSBCFG_ULPI_UTMI_SEL (1 << 4) +#define DWC2_GUSBCFG_ULPI_UTMI_SEL_OFFSET 4 +#define DWC2_GUSBCFG_FSINTF (1 << 5) +#define DWC2_GUSBCFG_FSINTF_OFFSET 5 +#define DWC2_GUSBCFG_PHYSEL (1 << 6) +#define DWC2_GUSBCFG_PHYSEL_OFFSET 6 +#define DWC2_GUSBCFG_DDRSEL (1 << 7) +#define DWC2_GUSBCFG_DDRSEL_OFFSET 7 +#define DWC2_GUSBCFG_SRPCAP (1 << 8) +#define DWC2_GUSBCFG_SRPCAP_OFFSET 8 +#define DWC2_GUSBCFG_HNPCAP (1 << 9) +#define DWC2_GUSBCFG_HNPCAP_OFFSET 9 +#define DWC2_GUSBCFG_USBTRDTIM_MASK (0xF << 10) +#define DWC2_GUSBCFG_USBTRDTIM_OFFSET 10 +#define DWC2_GUSBCFG_NPTXFRWNDEN (1 << 14) +#define DWC2_GUSBCFG_NPTXFRWNDEN_OFFSET 14 +#define DWC2_GUSBCFG_PHYLPWRCLKSEL (1 << 15) +#define DWC2_GUSBCFG_PHYLPWRCLKSEL_OFFSET 15 +#define DWC2_GUSBCFG_OTGUTMIFSSEL (1 << 16) +#define DWC2_GUSBCFG_OTGUTMIFSSEL_OFFSET 16 +#define DWC2_GUSBCFG_ULPI_FSLS (1 << 17) +#define DWC2_GUSBCFG_ULPI_FSLS_OFFSET 17 +#define DWC2_GUSBCFG_ULPI_AUTO_RES (1 << 18) +#define DWC2_GUSBCFG_ULPI_AUTO_RES_OFFSET 18 +#define DWC2_GUSBCFG_ULPI_CLK_SUS_M (1 << 19) +#define DWC2_GUSBCFG_ULPI_CLK_SUS_M_OFFSET 19 +#define DWC2_GUSBCFG_ULPI_EXT_VBUS_DRV (1 << 20) +#define DWC2_GUSBCFG_ULPI_EXT_VBUS_DRV_OFFSET 20 +#define DWC2_GUSBCFG_ULPI_INT_VBUS_INDICATOR (1 << 21) +#define DWC2_GUSBCFG_ULPI_INT_VBUS_INDICATOR_OFFSET 21 +#define DWC2_GUSBCFG_TERM_SEL_DL_PULSE (1 << 22) +#define DWC2_GUSBCFG_TERM_SEL_DL_PULSE_OFFSET 22 +#define DWC2_GUSBCFG_IC_USB_CAP (1 << 26) +#define DWC2_GUSBCFG_IC_USB_CAP_OFFSET 26 +#define DWC2_GUSBCFG_IC_TRAFFIC_PULL_REMOVE (1 << 27) +#define DWC2_GUSBCFG_IC_TRAFFIC_PULL_REMOVE_OFFSET 27 +#define DWC2_GUSBCFG_TX_END_DELAY (1 << 28) +#define DWC2_GUSBCFG_TX_END_DELAY_OFFSET 28 +#define DWC2_GUSBCFG_FORCEHOSTMODE (1 << 29) +#define DWC2_GUSBCFG_FORCEHOSTMODE_OFFSET 29 +#define DWC2_GUSBCFG_FORCEDEVMODE (1 << 30) +#define DWC2_GUSBCFG_FORCEDEVMODE_OFFSET 30 +#define DWC2_GLPMCTL_LPM_CAP_EN (1 << 0) +#define DWC2_GLPMCTL_LPM_CAP_EN_OFFSET 0 +#define DWC2_GLPMCTL_APPL_RESP (1 << 1) +#define DWC2_GLPMCTL_APPL_RESP_OFFSET 1 +#define DWC2_GLPMCTL_HIRD_MASK (0xF << 2) +#define DWC2_GLPMCTL_HIRD_OFFSET 2 +#define DWC2_GLPMCTL_REM_WKUP_EN (1 << 6) +#define DWC2_GLPMCTL_REM_WKUP_EN_OFFSET 6 +#define DWC2_GLPMCTL_EN_UTMI_SLEEP (1 << 7) +#define DWC2_GLPMCTL_EN_UTMI_SLEEP_OFFSET 7 +#define DWC2_GLPMCTL_HIRD_THRES_MASK (0x1F << 8) +#define DWC2_GLPMCTL_HIRD_THRES_OFFSET 8 +#define DWC2_GLPMCTL_LPM_RESP_MASK (0x3 << 13) +#define DWC2_GLPMCTL_LPM_RESP_OFFSET 13 +#define DWC2_GLPMCTL_PRT_SLEEP_STS (1 << 15) +#define DWC2_GLPMCTL_PRT_SLEEP_STS_OFFSET 15 +#define DWC2_GLPMCTL_SLEEP_STATE_RESUMEOK (1 << 16) +#define DWC2_GLPMCTL_SLEEP_STATE_RESUMEOK_OFFSET 16 +#define DWC2_GLPMCTL_LPM_CHAN_INDEX_MASK (0xF << 17) +#define DWC2_GLPMCTL_LPM_CHAN_INDEX_OFFSET 17 +#define DWC2_GLPMCTL_RETRY_COUNT_MASK (0x7 << 21) +#define DWC2_GLPMCTL_RETRY_COUNT_OFFSET 21 +#define DWC2_GLPMCTL_SEND_LPM (1 << 24) +#define DWC2_GLPMCTL_SEND_LPM_OFFSET 24 +#define DWC2_GLPMCTL_RETRY_COUNT_STS_MASK (0x7 << 25) +#define DWC2_GLPMCTL_RETRY_COUNT_STS_OFFSET 25 +#define DWC2_GLPMCTL_HSIC_CONNECT (1 << 30) +#define DWC2_GLPMCTL_HSIC_CONNECT_OFFSET 30 +#define DWC2_GLPMCTL_INV_SEL_HSIC (1 << 31) +#define DWC2_GLPMCTL_INV_SEL_HSIC_OFFSET 31 +#define DWC2_GRSTCTL_CSFTRST (1 << 0) +#define DWC2_GRSTCTL_CSFTRST_OFFSET 0 +#define DWC2_GRSTCTL_HSFTRST (1 << 1) +#define DWC2_GRSTCTL_HSFTRST_OFFSET 1 +#define DWC2_GRSTCTL_HSTFRM (1 << 2) +#define DWC2_GRSTCTL_HSTFRM_OFFSET 2 +#define DWC2_GRSTCTL_INTKNQFLSH (1 << 3) +#define DWC2_GRSTCTL_INTKNQFLSH_OFFSET 3 +#define DWC2_GRSTCTL_RXFFLSH (1 << 4) +#define DWC2_GRSTCTL_RXFFLSH_OFFSET 4 +#define DWC2_GRSTCTL_TXFFLSH (1 << 5) +#define DWC2_GRSTCTL_TXFFLSH_OFFSET 5 +#define DWC2_GRSTCTL_TXFNUM_MASK (0x1F << 6) +#define DWC2_GRSTCTL_TXFNUM_OFFSET 6 +#define DWC2_GRSTCTL_DMAREQ (1 << 30) +#define DWC2_GRSTCTL_DMAREQ_OFFSET 30 +#define DWC2_GRSTCTL_AHBIDLE (1 << 31) +#define DWC2_GRSTCTL_AHBIDLE_OFFSET 31 +#define DWC2_GINTMSK_MODEMISMATCH (1 << 1) +#define DWC2_GINTMSK_MODEMISMATCH_OFFSET 1 +#define DWC2_GINTMSK_OTGINTR (1 << 2) +#define DWC2_GINTMSK_OTGINTR_OFFSET 2 +#define DWC2_GINTMSK_SOFINTR (1 << 3) +#define DWC2_GINTMSK_SOFINTR_OFFSET 3 +#define DWC2_GINTMSK_RXSTSQLVL (1 << 4) +#define DWC2_GINTMSK_RXSTSQLVL_OFFSET 4 +#define DWC2_GINTMSK_NPTXFEMPTY (1 << 5) +#define DWC2_GINTMSK_NPTXFEMPTY_OFFSET 5 +#define DWC2_GINTMSK_GINNAKEFF (1 << 6) +#define DWC2_GINTMSK_GINNAKEFF_OFFSET 6 +#define DWC2_GINTMSK_GOUTNAKEFF (1 << 7) +#define DWC2_GINTMSK_GOUTNAKEFF_OFFSET 7 +#define DWC2_GINTMSK_I2CINTR (1 << 9) +#define DWC2_GINTMSK_I2CINTR_OFFSET 9 +#define DWC2_GINTMSK_ERLYSUSPEND (1 << 10) +#define DWC2_GINTMSK_ERLYSUSPEND_OFFSET 10 +#define DWC2_GINTMSK_USBSUSPEND (1 << 11) +#define DWC2_GINTMSK_USBSUSPEND_OFFSET 11 +#define DWC2_GINTMSK_USBRESET (1 << 12) +#define DWC2_GINTMSK_USBRESET_OFFSET 12 +#define DWC2_GINTMSK_ENUMDONE (1 << 13) +#define DWC2_GINTMSK_ENUMDONE_OFFSET 13 +#define DWC2_GINTMSK_ISOOUTDROP (1 << 14) +#define DWC2_GINTMSK_ISOOUTDROP_OFFSET 14 +#define DWC2_GINTMSK_EOPFRAME (1 << 15) +#define DWC2_GINTMSK_EOPFRAME_OFFSET 15 +#define DWC2_GINTMSK_EPMISMATCH (1 << 17) +#define DWC2_GINTMSK_EPMISMATCH_OFFSET 17 +#define DWC2_GINTMSK_INEPINTR (1 << 18) +#define DWC2_GINTMSK_INEPINTR_OFFSET 18 +#define DWC2_GINTMSK_OUTEPINTR (1 << 19) +#define DWC2_GINTMSK_OUTEPINTR_OFFSET 19 +#define DWC2_GINTMSK_INCOMPLISOIN (1 << 20) +#define DWC2_GINTMSK_INCOMPLISOIN_OFFSET 20 +#define DWC2_GINTMSK_INCOMPLISOOUT (1 << 21) +#define DWC2_GINTMSK_INCOMPLISOOUT_OFFSET 21 +#define DWC2_GINTMSK_PORTINTR (1 << 24) +#define DWC2_GINTMSK_PORTINTR_OFFSET 24 +#define DWC2_GINTMSK_HCINTR (1 << 25) +#define DWC2_GINTMSK_HCINTR_OFFSET 25 +#define DWC2_GINTMSK_PTXFEMPTY (1 << 26) +#define DWC2_GINTMSK_PTXFEMPTY_OFFSET 26 +#define DWC2_GINTMSK_LPMTRANRCVD (1 << 27) +#define DWC2_GINTMSK_LPMTRANRCVD_OFFSET 27 +#define DWC2_GINTMSK_CONIDSTSCHNG (1 << 28) +#define DWC2_GINTMSK_CONIDSTSCHNG_OFFSET 28 +#define DWC2_GINTMSK_DISCONNECT (1 << 29) +#define DWC2_GINTMSK_DISCONNECT_OFFSET 29 +#define DWC2_GINTMSK_SESSREQINTR (1 << 30) +#define DWC2_GINTMSK_SESSREQINTR_OFFSET 30 +#define DWC2_GINTMSK_WKUPINTR (1 << 31) +#define DWC2_GINTMSK_WKUPINTR_OFFSET 31 +#define DWC2_GINTSTS_CURMODE_DEVICE (0 << 0) +#define DWC2_GINTSTS_CURMODE_HOST (1 << 0) +#define DWC2_GINTSTS_CURMODE (1 << 0) +#define DWC2_GINTSTS_CURMODE_OFFSET 0 +#define DWC2_GINTSTS_MODEMISMATCH (1 << 1) +#define DWC2_GINTSTS_MODEMISMATCH_OFFSET 1 +#define DWC2_GINTSTS_OTGINTR (1 << 2) +#define DWC2_GINTSTS_OTGINTR_OFFSET 2 +#define DWC2_GINTSTS_SOFINTR (1 << 3) +#define DWC2_GINTSTS_SOFINTR_OFFSET 3 +#define DWC2_GINTSTS_RXSTSQLVL (1 << 4) +#define DWC2_GINTSTS_RXSTSQLVL_OFFSET 4 +#define DWC2_GINTSTS_NPTXFEMPTY (1 << 5) +#define DWC2_GINTSTS_NPTXFEMPTY_OFFSET 5 +#define DWC2_GINTSTS_GINNAKEFF (1 << 6) +#define DWC2_GINTSTS_GINNAKEFF_OFFSET 6 +#define DWC2_GINTSTS_GOUTNAKEFF (1 << 7) +#define DWC2_GINTSTS_GOUTNAKEFF_OFFSET 7 +#define DWC2_GINTSTS_I2CINTR (1 << 9) +#define DWC2_GINTSTS_I2CINTR_OFFSET 9 +#define DWC2_GINTSTS_ERLYSUSPEND (1 << 10) +#define DWC2_GINTSTS_ERLYSUSPEND_OFFSET 10 +#define DWC2_GINTSTS_USBSUSPEND (1 << 11) +#define DWC2_GINTSTS_USBSUSPEND_OFFSET 11 +#define DWC2_GINTSTS_USBRESET (1 << 12) +#define DWC2_GINTSTS_USBRESET_OFFSET 12 +#define DWC2_GINTSTS_ENUMDONE (1 << 13) +#define DWC2_GINTSTS_ENUMDONE_OFFSET 13 +#define DWC2_GINTSTS_ISOOUTDROP (1 << 14) +#define DWC2_GINTSTS_ISOOUTDROP_OFFSET 14 +#define DWC2_GINTSTS_EOPFRAME (1 << 15) +#define DWC2_GINTSTS_EOPFRAME_OFFSET 15 +#define DWC2_GINTSTS_INTOKENRX (1 << 16) +#define DWC2_GINTSTS_INTOKENRX_OFFSET 16 +#define DWC2_GINTSTS_EPMISMATCH (1 << 17) +#define DWC2_GINTSTS_EPMISMATCH_OFFSET 17 +#define DWC2_GINTSTS_INEPINT (1 << 18) +#define DWC2_GINTSTS_INEPINT_OFFSET 18 +#define DWC2_GINTSTS_OUTEPINTR (1 << 19) +#define DWC2_GINTSTS_OUTEPINTR_OFFSET 19 +#define DWC2_GINTSTS_INCOMPLISOIN (1 << 20) +#define DWC2_GINTSTS_INCOMPLISOIN_OFFSET 20 +#define DWC2_GINTSTS_INCOMPLISOOUT (1 << 21) +#define DWC2_GINTSTS_INCOMPLISOOUT_OFFSET 21 +#define DWC2_GINTSTS_PORTINTR (1 << 24) +#define DWC2_GINTSTS_PORTINTR_OFFSET 24 +#define DWC2_GINTSTS_HCINTR (1 << 25) +#define DWC2_GINTSTS_HCINTR_OFFSET 25 +#define DWC2_GINTSTS_PTXFEMPTY (1 << 26) +#define DWC2_GINTSTS_PTXFEMPTY_OFFSET 26 +#define DWC2_GINTSTS_LPMTRANRCVD (1 << 27) +#define DWC2_GINTSTS_LPMTRANRCVD_OFFSET 27 +#define DWC2_GINTSTS_CONIDSTSCHNG (1 << 28) +#define DWC2_GINTSTS_CONIDSTSCHNG_OFFSET 28 +#define DWC2_GINTSTS_DISCONNECT (1 << 29) +#define DWC2_GINTSTS_DISCONNECT_OFFSET 29 +#define DWC2_GINTSTS_SESSREQINTR (1 << 30) +#define DWC2_GINTSTS_SESSREQINTR_OFFSET 30 +#define DWC2_GINTSTS_WKUPINTR (1 << 31) +#define DWC2_GINTSTS_WKUPINTR_OFFSET 31 +#define DWC2_GRXSTS_EPNUM_MASK (0xF << 0) +#define DWC2_GRXSTS_EPNUM_OFFSET 0 +#define DWC2_GRXSTS_BCNT_MASK (0x7FF << 4) +#define DWC2_GRXSTS_BCNT_OFFSET 4 +#define DWC2_GRXSTS_DPID_MASK (0x3 << 15) +#define DWC2_GRXSTS_DPID_OFFSET 15 +#define DWC2_GRXSTS_PKTSTS_MASK (0xF << 17) +#define DWC2_GRXSTS_PKTSTS_OFFSET 17 +#define DWC2_GRXSTS_FN_MASK (0xF << 21) +#define DWC2_GRXSTS_FN_OFFSET 21 +#define DWC2_FIFOSIZE_STARTADDR_MASK (0xFFFF << 0) +#define DWC2_FIFOSIZE_STARTADDR_OFFSET 0 +#define DWC2_FIFOSIZE_DEPTH_MASK (0xFFFF << 16) +#define DWC2_FIFOSIZE_DEPTH_OFFSET 16 +#define DWC2_GNPTXSTS_NPTXFSPCAVAIL_MASK (0xFFFF << 0) +#define DWC2_GNPTXSTS_NPTXFSPCAVAIL_OFFSET 0 +#define DWC2_GNPTXSTS_NPTXQSPCAVAIL_MASK (0xFF << 16) +#define DWC2_GNPTXSTS_NPTXQSPCAVAIL_OFFSET 16 +#define DWC2_GNPTXSTS_NPTXQTOP_TERMINATE (1 << 24) +#define DWC2_GNPTXSTS_NPTXQTOP_TERMINATE_OFFSET 24 +#define DWC2_GNPTXSTS_NPTXQTOP_TOKEN_MASK (0x3 << 25) +#define DWC2_GNPTXSTS_NPTXQTOP_TOKEN_OFFSET 25 +#define DWC2_GNPTXSTS_NPTXQTOP_CHNEP_MASK (0xF << 27) +#define DWC2_GNPTXSTS_NPTXQTOP_CHNEP_OFFSET 27 +#define DWC2_DTXFSTS_TXFSPCAVAIL_MASK (0xFFFF << 0) +#define DWC2_DTXFSTS_TXFSPCAVAIL_OFFSET 0 +#define DWC2_GI2CCTL_RWDATA_MASK (0xFF << 0) +#define DWC2_GI2CCTL_RWDATA_OFFSET 0 +#define DWC2_GI2CCTL_REGADDR_MASK (0xFF << 8) +#define DWC2_GI2CCTL_REGADDR_OFFSET 8 +#define DWC2_GI2CCTL_ADDR_MASK (0x7F << 16) +#define DWC2_GI2CCTL_ADDR_OFFSET 16 +#define DWC2_GI2CCTL_I2CEN (1 << 23) +#define DWC2_GI2CCTL_I2CEN_OFFSET 23 +#define DWC2_GI2CCTL_ACK (1 << 24) +#define DWC2_GI2CCTL_ACK_OFFSET 24 +#define DWC2_GI2CCTL_I2CSUSPCTL (1 << 25) +#define DWC2_GI2CCTL_I2CSUSPCTL_OFFSET 25 +#define DWC2_GI2CCTL_I2CDEVADDR_MASK (0x3 << 26) +#define DWC2_GI2CCTL_I2CDEVADDR_OFFSET 26 +#define DWC2_GI2CCTL_RW (1 << 30) +#define DWC2_GI2CCTL_RW_OFFSET 30 +#define DWC2_GI2CCTL_BSYDNE (1 << 31) +#define DWC2_GI2CCTL_BSYDNE_OFFSET 31 +#define DWC2_HWCFG1_EP_DIR0_MASK (0x3 << 0) +#define DWC2_HWCFG1_EP_DIR0_OFFSET 0 +#define DWC2_HWCFG1_EP_DIR1_MASK (0x3 << 2) +#define DWC2_HWCFG1_EP_DIR1_OFFSET 2 +#define DWC2_HWCFG1_EP_DIR2_MASK (0x3 << 4) +#define DWC2_HWCFG1_EP_DIR2_OFFSET 4 +#define DWC2_HWCFG1_EP_DIR3_MASK (0x3 << 6) +#define DWC2_HWCFG1_EP_DIR3_OFFSET 6 +#define DWC2_HWCFG1_EP_DIR4_MASK (0x3 << 8) +#define DWC2_HWCFG1_EP_DIR4_OFFSET 8 +#define DWC2_HWCFG1_EP_DIR5_MASK (0x3 << 10) +#define DWC2_HWCFG1_EP_DIR5_OFFSET 10 +#define DWC2_HWCFG1_EP_DIR6_MASK (0x3 << 12) +#define DWC2_HWCFG1_EP_DIR6_OFFSET 12 +#define DWC2_HWCFG1_EP_DIR7_MASK (0x3 << 14) +#define DWC2_HWCFG1_EP_DIR7_OFFSET 14 +#define DWC2_HWCFG1_EP_DIR8_MASK (0x3 << 16) +#define DWC2_HWCFG1_EP_DIR8_OFFSET 16 +#define DWC2_HWCFG1_EP_DIR9_MASK (0x3 << 18) +#define DWC2_HWCFG1_EP_DIR9_OFFSET 18 +#define DWC2_HWCFG1_EP_DIR10_MASK (0x3 << 20) +#define DWC2_HWCFG1_EP_DIR10_OFFSET 20 +#define DWC2_HWCFG1_EP_DIR11_MASK (0x3 << 22) +#define DWC2_HWCFG1_EP_DIR11_OFFSET 22 +#define DWC2_HWCFG1_EP_DIR12_MASK (0x3 << 24) +#define DWC2_HWCFG1_EP_DIR12_OFFSET 24 +#define DWC2_HWCFG1_EP_DIR13_MASK (0x3 << 26) +#define DWC2_HWCFG1_EP_DIR13_OFFSET 26 +#define DWC2_HWCFG1_EP_DIR14_MASK (0x3 << 28) +#define DWC2_HWCFG1_EP_DIR14_OFFSET 28 +#define DWC2_HWCFG1_EP_DIR15_MASK (0x3 << 30) +#define DWC2_HWCFG1_EP_DIR15_OFFSET 30 +#define DWC2_HWCFG2_OP_MODE_MASK (0x7 << 0) +#define DWC2_HWCFG2_OP_MODE_OFFSET 0 +#define DWC2_HWCFG2_ARCHITECTURE_SLAVE_ONLY (0x0 << 3) +#define DWC2_HWCFG2_ARCHITECTURE_EXT_DMA (0x1 << 3) +#define DWC2_HWCFG2_ARCHITECTURE_INT_DMA (0x2 << 3) +#define DWC2_HWCFG2_ARCHITECTURE_MASK (0x3 << 3) +#define DWC2_HWCFG2_ARCHITECTURE_OFFSET 3 +#define DWC2_HWCFG2_POINT2POINT (1 << 5) +#define DWC2_HWCFG2_POINT2POINT_OFFSET 5 +#define DWC2_HWCFG2_HS_PHY_TYPE_MASK (0x3 << 6) +#define DWC2_HWCFG2_HS_PHY_TYPE_OFFSET 6 +#define DWC2_HWCFG2_FS_PHY_TYPE_MASK (0x3 << 8) +#define DWC2_HWCFG2_FS_PHY_TYPE_OFFSET 8 +#define DWC2_HWCFG2_NUM_DEV_EP_MASK (0xF << 10) +#define DWC2_HWCFG2_NUM_DEV_EP_OFFSET 10 +#define DWC2_HWCFG2_NUM_HOST_CHAN_MASK (0xF << 14) +#define DWC2_HWCFG2_NUM_HOST_CHAN_OFFSET 14 +#define DWC2_HWCFG2_PERIO_EP_SUPPORTED (1 << 18) +#define DWC2_HWCFG2_PERIO_EP_SUPPORTED_OFFSET 18 +#define DWC2_HWCFG2_DYNAMIC_FIFO (1 << 19) +#define DWC2_HWCFG2_DYNAMIC_FIFO_OFFSET 19 +#define DWC2_HWCFG2_MULTI_PROC_INT (1 << 20) +#define DWC2_HWCFG2_MULTI_PROC_INT_OFFSET 20 +#define DWC2_HWCFG2_NONPERIO_TX_Q_DEPTH_MASK (0x3 << 22) +#define DWC2_HWCFG2_NONPERIO_TX_Q_DEPTH_OFFSET 22 +#define DWC2_HWCFG2_HOST_PERIO_TX_Q_DEPTH_MASK (0x3 << 24) +#define DWC2_HWCFG2_HOST_PERIO_TX_Q_DEPTH_OFFSET 24 +#define DWC2_HWCFG2_DEV_TOKEN_Q_DEPTH_MASK (0x1F << 26) +#define DWC2_HWCFG2_DEV_TOKEN_Q_DEPTH_OFFSET 26 +#define DWC2_HWCFG3_XFER_SIZE_CNTR_WIDTH_MASK (0xF << 0) +#define DWC2_HWCFG3_XFER_SIZE_CNTR_WIDTH_OFFSET 0 +#define DWC2_HWCFG3_PACKET_SIZE_CNTR_WIDTH_MASK (0x7 << 4) +#define DWC2_HWCFG3_PACKET_SIZE_CNTR_WIDTH_OFFSET 4 +#define DWC2_HWCFG3_OTG_FUNC (1 << 7) +#define DWC2_HWCFG3_OTG_FUNC_OFFSET 7 +#define DWC2_HWCFG3_I2C (1 << 8) +#define DWC2_HWCFG3_I2C_OFFSET 8 +#define DWC2_HWCFG3_VENDOR_CTRL_IF (1 << 9) +#define DWC2_HWCFG3_VENDOR_CTRL_IF_OFFSET 9 +#define DWC2_HWCFG3_OPTIONAL_FEATURES (1 << 10) +#define DWC2_HWCFG3_OPTIONAL_FEATURES_OFFSET 10 +#define DWC2_HWCFG3_SYNCH_RESET_TYPE (1 << 11) +#define DWC2_HWCFG3_SYNCH_RESET_TYPE_OFFSET 11 +#define DWC2_HWCFG3_OTG_ENABLE_IC_USB (1 << 12) +#define DWC2_HWCFG3_OTG_ENABLE_IC_USB_OFFSET 12 +#define DWC2_HWCFG3_OTG_ENABLE_HSIC (1 << 13) +#define DWC2_HWCFG3_OTG_ENABLE_HSIC_OFFSET 13 +#define DWC2_HWCFG3_OTG_LPM_EN (1 << 15) +#define DWC2_HWCFG3_OTG_LPM_EN_OFFSET 15 +#define DWC2_HWCFG3_DFIFO_DEPTH_MASK (0xFFFF << 16) +#define DWC2_HWCFG3_DFIFO_DEPTH_OFFSET 16 +#define DWC2_HWCFG4_NUM_DEV_PERIO_IN_EP_MASK (0xF << 0) +#define DWC2_HWCFG4_NUM_DEV_PERIO_IN_EP_OFFSET 0 +#define DWC2_HWCFG4_POWER_OPTIMIZ (1 << 4) +#define DWC2_HWCFG4_POWER_OPTIMIZ_OFFSET 4 +#define DWC2_HWCFG4_MIN_AHB_FREQ_MASK (0x1FF << 5) +#define DWC2_HWCFG4_MIN_AHB_FREQ_OFFSET 5 +#define DWC2_HWCFG4_UTMI_PHY_DATA_WIDTH_MASK (0x3 << 14) +#define DWC2_HWCFG4_UTMI_PHY_DATA_WIDTH_OFFSET 14 +#define DWC2_HWCFG4_NUM_DEV_MODE_CTRL_EP_MASK (0xF << 16) +#define DWC2_HWCFG4_NUM_DEV_MODE_CTRL_EP_OFFSET 16 +#define DWC2_HWCFG4_IDDIG_FILT_EN (1 << 20) +#define DWC2_HWCFG4_IDDIG_FILT_EN_OFFSET 20 +#define DWC2_HWCFG4_VBUS_VALID_FILT_EN (1 << 21) +#define DWC2_HWCFG4_VBUS_VALID_FILT_EN_OFFSET 21 +#define DWC2_HWCFG4_A_VALID_FILT_EN (1 << 22) +#define DWC2_HWCFG4_A_VALID_FILT_EN_OFFSET 22 +#define DWC2_HWCFG4_B_VALID_FILT_EN (1 << 23) +#define DWC2_HWCFG4_B_VALID_FILT_EN_OFFSET 23 +#define DWC2_HWCFG4_SESSION_END_FILT_EN (1 << 24) +#define DWC2_HWCFG4_SESSION_END_FILT_EN_OFFSET 24 +#define DWC2_HWCFG4_DED_FIFO_EN (1 << 25) +#define DWC2_HWCFG4_DED_FIFO_EN_OFFSET 25 +#define DWC2_HWCFG4_NUM_IN_EPS_MASK (0xF << 26) +#define DWC2_HWCFG4_NUM_IN_EPS_OFFSET 26 +#define DWC2_HWCFG4_DESC_DMA (1 << 30) +#define DWC2_HWCFG4_DESC_DMA_OFFSET 30 +#define DWC2_HWCFG4_DESC_DMA_DYN (1 << 31) +#define DWC2_HWCFG4_DESC_DMA_DYN_OFFSET 31 +#define DWC2_HCFG_FSLSPCLKSEL_30_60_MHZ 0 +#define DWC2_HCFG_FSLSPCLKSEL_48_MHZ 1 +#define DWC2_HCFG_FSLSPCLKSEL_6_MHZ 2 +#define DWC2_HCFG_FSLSPCLKSEL_MASK (0x3 << 0) +#define DWC2_HCFG_FSLSPCLKSEL_OFFSET 0 +#define DWC2_HCFG_FSLSSUPP (1 << 2) +#define DWC2_HCFG_FSLSSUPP_OFFSET 2 +#define DWC2_HCFG_DESCDMA (1 << 23) +#define DWC2_HCFG_DESCDMA_OFFSET 23 +#define DWC2_HCFG_FRLISTEN_MASK (0x3 << 24) +#define DWC2_HCFG_FRLISTEN_OFFSET 24 +#define DWC2_HCFG_PERSCHEDENA (1 << 26) +#define DWC2_HCFG_PERSCHEDENA_OFFSET 26 +#define DWC2_HCFG_PERSCHEDSTAT (1 << 27) +#define DWC2_HCFG_PERSCHEDSTAT_OFFSET 27 +#define DWC2_HFIR_FRINT_MASK (0xFFFF << 0) +#define DWC2_HFIR_FRINT_OFFSET 0 +#define DWC2_HFNUM_FRNUM_MASK (0x3FFF << 0) +#define DWC2_HFNUM_FRNUM_OFFSET 0 +#define DWC2_HFNUM_FRREM_MASK (0xFFFF << 16) +#define DWC2_HFNUM_FRREM_OFFSET 16 +#define DWC2_HPTXSTS_PTXFSPCAVAIL_MASK (0xFFFF << 0) +#define DWC2_HPTXSTS_PTXFSPCAVAIL_OFFSET 0 +#define DWC2_HPTXSTS_PTXQSPCAVAIL_MASK (0xFF << 16) +#define DWC2_HPTXSTS_PTXQSPCAVAIL_OFFSET 16 +#define DWC2_HPTXSTS_PTXQTOP_TERMINATE (1 << 24) +#define DWC2_HPTXSTS_PTXQTOP_TERMINATE_OFFSET 24 +#define DWC2_HPTXSTS_PTXQTOP_TOKEN_MASK (0x3 << 25) +#define DWC2_HPTXSTS_PTXQTOP_TOKEN_OFFSET 25 +#define DWC2_HPTXSTS_PTXQTOP_CHNUM_MASK (0xF << 27) +#define DWC2_HPTXSTS_PTXQTOP_CHNUM_OFFSET 27 +#define DWC2_HPTXSTS_PTXQTOP_ODD (1 << 31) +#define DWC2_HPTXSTS_PTXQTOP_ODD_OFFSET 31 +#define DWC2_HPRT0_PRTCONNSTS (1 << 0) +#define DWC2_HPRT0_PRTCONNSTS_OFFSET 0 +#define DWC2_HPRT0_PRTCONNDET (1 << 1) +#define DWC2_HPRT0_PRTCONNDET_OFFSET 1 +#define DWC2_HPRT0_PRTENA (1 << 2) +#define DWC2_HPRT0_PRTENA_OFFSET 2 +#define DWC2_HPRT0_PRTENCHNG (1 << 3) +#define DWC2_HPRT0_PRTENCHNG_OFFSET 3 +#define DWC2_HPRT0_PRTOVRCURRACT (1 << 4) +#define DWC2_HPRT0_PRTOVRCURRACT_OFFSET 4 +#define DWC2_HPRT0_PRTOVRCURRCHNG (1 << 5) +#define DWC2_HPRT0_PRTOVRCURRCHNG_OFFSET 5 +#define DWC2_HPRT0_PRTRES (1 << 6) +#define DWC2_HPRT0_PRTRES_OFFSET 6 +#define DWC2_HPRT0_PRTSUSP (1 << 7) +#define DWC2_HPRT0_PRTSUSP_OFFSET 7 +#define DWC2_HPRT0_PRTRST (1 << 8) +#define DWC2_HPRT0_PRTRST_OFFSET 8 +#define DWC2_HPRT0_PRTLNSTS_MASK (0x3 << 10) +#define DWC2_HPRT0_PRTLNSTS_OFFSET 10 +#define DWC2_HPRT0_PRTPWR (1 << 12) +#define DWC2_HPRT0_PRTPWR_OFFSET 12 +#define DWC2_HPRT0_PRTTSTCTL_MASK (0xF << 13) +#define DWC2_HPRT0_PRTTSTCTL_OFFSET 13 +#define DWC2_HPRT0_PRTSPD_MASK (0x3 << 17) +#define DWC2_HPRT0_PRTSPD_OFFSET 17 +#define DWC2_HAINT_CH0 (1 << 0) +#define DWC2_HAINT_CH0_OFFSET 0 +#define DWC2_HAINT_CH1 (1 << 1) +#define DWC2_HAINT_CH1_OFFSET 1 +#define DWC2_HAINT_CH2 (1 << 2) +#define DWC2_HAINT_CH2_OFFSET 2 +#define DWC2_HAINT_CH3 (1 << 3) +#define DWC2_HAINT_CH3_OFFSET 3 +#define DWC2_HAINT_CH4 (1 << 4) +#define DWC2_HAINT_CH4_OFFSET 4 +#define DWC2_HAINT_CH5 (1 << 5) +#define DWC2_HAINT_CH5_OFFSET 5 +#define DWC2_HAINT_CH6 (1 << 6) +#define DWC2_HAINT_CH6_OFFSET 6 +#define DWC2_HAINT_CH7 (1 << 7) +#define DWC2_HAINT_CH7_OFFSET 7 +#define DWC2_HAINT_CH8 (1 << 8) +#define DWC2_HAINT_CH8_OFFSET 8 +#define DWC2_HAINT_CH9 (1 << 9) +#define DWC2_HAINT_CH9_OFFSET 9 +#define DWC2_HAINT_CH10 (1 << 10) +#define DWC2_HAINT_CH10_OFFSET 10 +#define DWC2_HAINT_CH11 (1 << 11) +#define DWC2_HAINT_CH11_OFFSET 11 +#define DWC2_HAINT_CH12 (1 << 12) +#define DWC2_HAINT_CH12_OFFSET 12 +#define DWC2_HAINT_CH13 (1 << 13) +#define DWC2_HAINT_CH13_OFFSET 13 +#define DWC2_HAINT_CH14 (1 << 14) +#define DWC2_HAINT_CH14_OFFSET 14 +#define DWC2_HAINT_CH15 (1 << 15) +#define DWC2_HAINT_CH15_OFFSET 15 +#define DWC2_HAINT_CHINT_MASK 0xffff +#define DWC2_HAINT_CHINT_OFFSET 0 +#define DWC2_HAINTMSK_CH0 (1 << 0) +#define DWC2_HAINTMSK_CH0_OFFSET 0 +#define DWC2_HAINTMSK_CH1 (1 << 1) +#define DWC2_HAINTMSK_CH1_OFFSET 1 +#define DWC2_HAINTMSK_CH2 (1 << 2) +#define DWC2_HAINTMSK_CH2_OFFSET 2 +#define DWC2_HAINTMSK_CH3 (1 << 3) +#define DWC2_HAINTMSK_CH3_OFFSET 3 +#define DWC2_HAINTMSK_CH4 (1 << 4) +#define DWC2_HAINTMSK_CH4_OFFSET 4 +#define DWC2_HAINTMSK_CH5 (1 << 5) +#define DWC2_HAINTMSK_CH5_OFFSET 5 +#define DWC2_HAINTMSK_CH6 (1 << 6) +#define DWC2_HAINTMSK_CH6_OFFSET 6 +#define DWC2_HAINTMSK_CH7 (1 << 7) +#define DWC2_HAINTMSK_CH7_OFFSET 7 +#define DWC2_HAINTMSK_CH8 (1 << 8) +#define DWC2_HAINTMSK_CH8_OFFSET 8 +#define DWC2_HAINTMSK_CH9 (1 << 9) +#define DWC2_HAINTMSK_CH9_OFFSET 9 +#define DWC2_HAINTMSK_CH10 (1 << 10) +#define DWC2_HAINTMSK_CH10_OFFSET 10 +#define DWC2_HAINTMSK_CH11 (1 << 11) +#define DWC2_HAINTMSK_CH11_OFFSET 11 +#define DWC2_HAINTMSK_CH12 (1 << 12) +#define DWC2_HAINTMSK_CH12_OFFSET 12 +#define DWC2_HAINTMSK_CH13 (1 << 13) +#define DWC2_HAINTMSK_CH13_OFFSET 13 +#define DWC2_HAINTMSK_CH14 (1 << 14) +#define DWC2_HAINTMSK_CH14_OFFSET 14 +#define DWC2_HAINTMSK_CH15 (1 << 15) +#define DWC2_HAINTMSK_CH15_OFFSET 15 +#define DWC2_HAINTMSK_CHINT_MASK 0xffff +#define DWC2_HAINTMSK_CHINT_OFFSET 0 +#define DWC2_HCCHAR_MPS_MASK (0x7FF << 0) +#define DWC2_HCCHAR_MPS_OFFSET 0 +#define DWC2_HCCHAR_EPNUM_MASK (0xF << 11) +#define DWC2_HCCHAR_EPNUM_OFFSET 11 +#define DWC2_HCCHAR_EPDIR (1 << 15) +#define DWC2_HCCHAR_EPDIR_OFFSET 15 +#define DWC2_HCCHAR_LSPDDEV (1 << 17) +#define DWC2_HCCHAR_LSPDDEV_OFFSET 17 +#define DWC2_HCCHAR_EPTYPE_CONTROL 0 +#define DWC2_HCCHAR_EPTYPE_ISOC 1 +#define DWC2_HCCHAR_EPTYPE_BULK 2 +#define DWC2_HCCHAR_EPTYPE_INTR 3 +#define DWC2_HCCHAR_EPTYPE_MASK (0x3 << 18) +#define DWC2_HCCHAR_EPTYPE_OFFSET 18 +#define DWC2_HCCHAR_MULTICNT_MASK (0x3 << 20) +#define DWC2_HCCHAR_MULTICNT_OFFSET 20 +#define DWC2_HCCHAR_DEVADDR_MASK (0x7F << 22) +#define DWC2_HCCHAR_DEVADDR_OFFSET 22 +#define DWC2_HCCHAR_ODDFRM (1 << 29) +#define DWC2_HCCHAR_ODDFRM_OFFSET 29 +#define DWC2_HCCHAR_CHDIS (1 << 30) +#define DWC2_HCCHAR_CHDIS_OFFSET 30 +#define DWC2_HCCHAR_CHEN (1 << 31) +#define DWC2_HCCHAR_CHEN_OFFSET 31 +#define DWC2_HCSPLT_PRTADDR_MASK (0x7F << 0) +#define DWC2_HCSPLT_PRTADDR_OFFSET 0 +#define DWC2_HCSPLT_HUBADDR_MASK (0x7F << 7) +#define DWC2_HCSPLT_HUBADDR_OFFSET 7 +#define DWC2_HCSPLT_XACTPOS_MASK (0x3 << 14) +#define DWC2_HCSPLT_XACTPOS_OFFSET 14 +#define DWC2_HCSPLT_COMPSPLT (1 << 16) +#define DWC2_HCSPLT_COMPSPLT_OFFSET 16 +#define DWC2_HCSPLT_SPLTENA (1 << 31) +#define DWC2_HCSPLT_SPLTENA_OFFSET 31 +#define DWC2_HCINT_XFERCOMP (1 << 0) // Transfer complete +#define DWC2_HCINT_XFERCOMP_OFFSET 0 +#define DWC2_HCINT_CHHLTD (1 << 1) // Channel halted +#define DWC2_HCINT_CHHLTD_OFFSET 1 +#define DWC2_HCINT_AHBERR (1 << 2) // AHB error +#define DWC2_HCINT_AHBERR_OFFSET 2 +#define DWC2_HCINT_STALL (1 << 3) // Stall response received +#define DWC2_HCINT_STALL_OFFSET 3 +#define DWC2_HCINT_NAK (1 << 4) // NAK response +#define DWC2_HCINT_NAK_OFFSET 4 +#define DWC2_HCINT_ACK (1 << 5) // ACK response +#define DWC2_HCINT_ACK_OFFSET 5 +#define DWC2_HCINT_NYET (1 << 6) // NYET +#define DWC2_HCINT_NYET_OFFSET 6 +#define DWC2_HCINT_XACTERR (1 << 7) // Transaction Error +#define DWC2_HCINT_XACTERR_OFFSET 7 +#define DWC2_HCINT_BBLERR (1 << 8) // Babble Error +#define DWC2_HCINT_BBLERR_OFFSET 8 +#define DWC2_HCINT_FRMOVRUN (1 << 9) // Frame overrun +#define DWC2_HCINT_FRMOVRUN_OFFSET 9 +#define DWC2_HCINT_DATATGLERR (1 << 10) // Data Toggle +#define DWC2_HCINT_DATATGLERR_OFFSET 10 +#define DWC2_HCINT_BNA (1 << 11) // Buffer Not Available +#define DWC2_HCINT_BNA_OFFSET 11 +#define DWC2_HCINT_XCS_XACT (1 << 12) // Excessive Transaction +#define DWC2_HCINT_XCS_XACT_OFFSET 12 +#define DWC2_HCINT_FRM_LIST_ROLL (1 << 13) // Frame List Rollover +#define DWC2_HCINT_FRM_LIST_ROLL_OFFSET 13 +#define DWC2_HCINTMSK_XFERCOMPL (1 << 0) +#define DWC2_HCINTMSK_XFERCOMPL_OFFSET 0 +#define DWC2_HCINTMSK_CHHLTD (1 << 1) +#define DWC2_HCINTMSK_CHHLTD_OFFSET 1 +#define DWC2_HCINTMSK_AHBERR (1 << 2) +#define DWC2_HCINTMSK_AHBERR_OFFSET 2 +#define DWC2_HCINTMSK_STALL (1 << 3) +#define DWC2_HCINTMSK_STALL_OFFSET 3 +#define DWC2_HCINTMSK_NAK (1 << 4) +#define DWC2_HCINTMSK_NAK_OFFSET 4 +#define DWC2_HCINTMSK_ACK (1 << 5) +#define DWC2_HCINTMSK_ACK_OFFSET 5 +#define DWC2_HCINTMSK_NYET (1 << 6) +#define DWC2_HCINTMSK_NYET_OFFSET 6 +#define DWC2_HCINTMSK_XACTERR (1 << 7) +#define DWC2_HCINTMSK_XACTERR_OFFSET 7 +#define DWC2_HCINTMSK_BBLERR (1 << 8) +#define DWC2_HCINTMSK_BBLERR_OFFSET 8 +#define DWC2_HCINTMSK_FRMOVRUN (1 << 9) +#define DWC2_HCINTMSK_FRMOVRUN_OFFSET 9 +#define DWC2_HCINTMSK_DATATGLERR (1 << 10) +#define DWC2_HCINTMSK_DATATGLERR_OFFSET 10 +#define DWC2_HCINTMSK_BNA (1 << 11) +#define DWC2_HCINTMSK_BNA_OFFSET 11 +#define DWC2_HCINTMSK_XCS_XACT (1 << 12) +#define DWC2_HCINTMSK_XCS_XACT_OFFSET 12 +#define DWC2_HCINTMSK_FRM_LIST_ROLL (1 << 13) +#define DWC2_HCINTMSK_FRM_LIST_ROLL_OFFSET 13 +#define DWC2_HCTSIZ_XFERSIZE_MASK 0x7ffff +#define DWC2_HCTSIZ_XFERSIZE_OFFSET 0 +#define DWC2_HCTSIZ_SCHINFO_MASK 0xff +#define DWC2_HCTSIZ_SCHINFO_OFFSET 0 +#define DWC2_HCTSIZ_NTD_MASK (0xff << 8) +#define DWC2_HCTSIZ_NTD_OFFSET 8 +#define DWC2_HCTSIZ_PKTCNT_MASK (0x3ff << 19) +#define DWC2_HCTSIZ_PKTCNT_OFFSET 19 +#define DWC2_HCTSIZ_PID_MASK (0x3 << 29) +#define DWC2_HCTSIZ_PID_OFFSET 29 +#define DWC2_HCTSIZ_DOPNG (1 << 31) +#define DWC2_HCTSIZ_DOPNG_OFFSET 31 +#define DWC2_HCDMA_CTD_MASK (0xFF << 3) +#define DWC2_HCDMA_CTD_OFFSET 3 +#define DWC2_HCDMA_DMA_ADDR_MASK (0x1FFFFF << 11) +#define DWC2_HCDMA_DMA_ADDR_OFFSET 11 +#define DWC2_PCGCCTL_STOPPCLK (1 << 0) +#define DWC2_PCGCCTL_STOPPCLK_OFFSET 0 +#define DWC2_PCGCCTL_GATEHCLK (1 << 1) +#define DWC2_PCGCCTL_GATEHCLK_OFFSET 1 +#define DWC2_PCGCCTL_PWRCLMP (1 << 2) +#define DWC2_PCGCCTL_PWRCLMP_OFFSET 2 +#define DWC2_PCGCCTL_RSTPDWNMODULE (1 << 3) +#define DWC2_PCGCCTL_RSTPDWNMODULE_OFFSET 3 +#define DWC2_PCGCCTL_PHYSUSPENDED (1 << 4) +#define DWC2_PCGCCTL_PHYSUSPENDED_OFFSET 4 +#define DWC2_PCGCCTL_ENBL_SLEEP_GATING (1 << 5) +#define DWC2_PCGCCTL_ENBL_SLEEP_GATING_OFFSET 5 +#define DWC2_PCGCCTL_PHY_IN_SLEEP (1 << 6) +#define DWC2_PCGCCTL_PHY_IN_SLEEP_OFFSET 6 +#define DWC2_PCGCCTL_DEEP_SLEEP (1 << 7) +#define DWC2_PCGCCTL_DEEP_SLEEP_OFFSET 7 +#define DWC2_SNPSID_DEVID_VER_2xx (0x4f542 << 12) +#define DWC2_SNPSID_DEVID_VER_3xx (0x4f543 << 12) +#define DWC2_SNPSID_DEVID_MASK (0xfffff << 12) +#define DWC2_SNPSID_DEVID_OFFSET 12 + +/* Host controller specific */ +#define DWC2_HC_PID_DATA0 0 +#define DWC2_HC_PID_DATA2 1 +#define DWC2_HC_PID_DATA1 2 +#define DWC2_HC_PID_MDATA 3 +#define DWC2_HC_PID_SETUP 3 + +/* roothub.a masks */ +#define RH_A_NDP (0xff << 0) /* number of downstream ports */ +#define RH_A_PSM (1 << 8) /* power switching mode */ +#define RH_A_NPS (1 << 9) /* no power switching */ +#define RH_A_DT (1 << 10) /* device type (mbz) */ +#define RH_A_OCPM (1 << 11) /* over current protection mode */ +#define RH_A_NOCP (1 << 12) /* no over current protection */ +#define RH_A_POTPGT (0xff << 24) /* power on to power good time */ + +/* roothub.b masks */ +#define RH_B_DR 0x0000ffff /* device removable flags */ +#define RH_B_PPCM 0xffff0000 /* port power control mask */ + +#define DWC2_PHY_TYPE_FS 0 +#define DWC2_PHY_TYPE_UTMI 1 +#define DWC2_PHY_TYPE_ULPI 2 +#define CONFIG_DWC2_PHY_TYPE DWC2_PHY_TYPE_UTMI /* PHY type */ +#define CONFIG_DWC2_UTMI_WIDTH 8 /* UTMI bus width (8/16) */ + +#define DWC2_DMA_BURST_SIZE 32 /* DMA burst len */ +#define DWC2_MAX_CHANNELS 16 /* Max # of EPs */ +#define DWC2_HOST_RX_FIFO_SIZE (516 + DWC2_MAX_CHANNELS) +#define DWC2_HOST_NPERIO_TX_FIFO_SIZE 0x100 /* nPeriodic TX FIFO */ +#define DWC2_HOST_PERIO_TX_FIFO_SIZE 0x200 /* Periodic TX FIFO */ +#define DWC2_MAX_TRANSFER_SIZE 65535 +#define DWC2_MAX_PACKET_COUNT 511 + +#define DWC2_HC_CHANNEL 0 +#define DWC2_HC_CHANNEL_ASYNC 1 +#define DWC2_HC_CHANNEL_SYNC 2 +#define DWC2_HC_CHANNEL_BULK 3 +#define DWC2_HC_PORT 0 + +#define DWC2_STATUS_BUF_SIZE 64 +#define DWC2_DATA_BUF_SIZE (64 * 1024) + + +#define USB_PORT_FEAT_CONNECTION 0 +#define USB_PORT_FEAT_ENABLE 1 +#define USB_PORT_FEAT_SUSPEND 2 +#define USB_PORT_FEAT_OVER_CURRENT 3 +#define USB_PORT_FEAT_RESET 4 +#define USB_PORT_FEAT_POWER 8 +#define USB_PORT_FEAT_LOWSPEED 9 +#define USB_PORT_FEAT_HIGHSPEED 10 +#define USB_PORT_FEAT_C_CONNECTION 16 +#define USB_PORT_FEAT_C_ENABLE 17 +#define USB_PORT_FEAT_C_SUSPEND 18 +#define USB_PORT_FEAT_C_OVER_CURRENT 19 +#define USB_PORT_FEAT_C_RESET 20 +#define USB_PORT_FEAT_TEST 21 + +#endif /* __DWCHW_H__ */ diff --git a/Platform/Raspberry/Pi3/Include/Protocol/DwUsb.h b/Platform/Raspberry/Pi3/Include/Protocol/DwUsb.h new file mode 100644 index 000000000000..ac57960e048a --- /dev/null +++ b/Platform/Raspberry/Pi3/Include/Protocol/DwUsb.h @@ -0,0 +1,53 @@ +/** @file + * + * Copyright (c) 2015-2016, Linaro. All rights reserved. + * Copyright (c) 2015-2016, Hisilicon Limited. All rights reserved. + * + * This program and the accompanying materials + * are licensed and made available under the terms and conditions of the BSD License + * which accompanies this distribution. The full text of the license may be found at + * http://opensource.org/licenses/bsd-license.php + * + * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + * + **/ + +#ifndef __DW_USB_PROTOCOL_H__ +#define __DW_USB_PROTOCOL_H__ + +// +// Protocol GUID +// +#define DW_USB_PROTOCOL_GUID { 0x109fa264, 0x7811, 0x4862, { 0xa9, 0x73, 0x4a, 0xb2, 0xef, 0x2e, 0xe2, 0xff }} + +// +// Protocol interface structure +// +typedef struct _DW_USB_PROTOCOL DW_USB_PROTOCOL; + +#define USB_HOST_MODE 0 +#define USB_DEVICE_MODE 1 +#define USB_CABLE_NOT_ATTACHED 2 + +typedef +EFI_STATUS +(EFIAPI *DW_USB_GET_SERIAL_NO) ( + OUT CHAR16 *SerialNo, + OUT UINT8 *Length + ); + +typedef +EFI_STATUS +(EFIAPI *DW_USB_PHY_INIT) ( + IN UINT8 Mode + ); + +struct _DW_USB_PROTOCOL { + DW_USB_GET_SERIAL_NO Get; + DW_USB_PHY_INIT PhyInit; +}; + +extern EFI_GUID gDwUsbProtocolGuid; + +#endif /* __DW_USB_PROTOCOL_H__ */ -- 2.17.0.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel
