Reviewed-by: Chasel Chiu <chasel.c...@intel.com>
> -----Original Message----- > From: Kubacki, Michael A > Sent: Tuesday, April 2, 2019 10:47 AM > To: edk2-devel@lists.01.org > Cc: Sinha, Ankit <ankit.si...@intel.com>; Desimone, Nathaniel L > <nathaniel.l.desim...@intel.com>; Chiu, Chasel <chasel.c...@intel.com>; Gao, > Liming <liming....@intel.com>; Kinney, Michael D > <michael.d.kin...@intel.com> > Subject: [edk2-platforms/devel-MinPlatform][PATCH v4 2/3] > ClevoOpenBoardPkg/N1xxWU: Flash map update > > Updates the total BIOS flash image size to 0x5E0000. This size matches the > BIOS > region size already configured in the SPI flash descriptor. > > To write an image produced from the N1xxWU board build, write the N1XXWU.fd > file (~6 MB) to the beginning of the BIOS region in the SPI flash (currently > 0x220000). > > Always back up the original SPI flash image. These offsets and sizes are > subject to > change over time. > > Cc: Ankit Sinha <ankit.si...@intel.com> > Cc: Nate DeSimone <nathaniel.l.desim...@intel.com> > Cc: Chasel Chiu <chasel.c...@intel.com> > Cc: Liming Gao <liming....@intel.com> > Cc: Michael D Kinney <michael.d.kin...@intel.com> > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Michael Kubacki <michael.a.kuba...@intel.com> > --- > .../ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc | 2 +- > .../N1xxWU/Include/Fdf/FlashMapInclude.fdf | 44 > +++++++++++----------- > .../Intel/ClevoOpenBoardPkg/N1xxWU/prebuild.bat | 4 +- > 3 files changed, 26 insertions(+), 24 deletions(-) > > diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc > b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc > index 81487ed58d..2116c48fc0 100644 > --- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc > +++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/OpenBoardPkg.dsc > @@ -55,7 +55,7 @@ > # > # Default value for OpenBoardPkg.fdf use > # > - DEFINE BIOS_SIZE_OPTION = SIZE_70 > + DEFINE BIOS_SIZE_OPTION = SIZE_60 > > > ################################################################ > ################ > # > diff --git > a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude. > fdf > b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude. > fdf > index a727eb3b83..423c6b18f5 100644 > --- > a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclude. > fdf > +++ > b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/Include/Fdf/FlashMapInclud > +++ e.fdf > @@ -14,39 +14,41 @@ > ## > > > #=============================================================== > ==================# > -# 8 M BIOS - for FSP wrapper > +# 6 M BIOS - for FSP wrapper > > #=============================================================== > ==================# > -DEFINE FLASH_BASE = > 0xFF800000 # > -DEFINE FLASH_SIZE = > 0x00800000 # > +DEFINE FLASH_BASE = > 0xFFA20000 # > +DEFINE FLASH_SIZE = > 0x005E0000 # > DEFINE FLASH_BLOCK_SIZE = > 0x00010000 > # > -DEFINE FLASH_NUM_BLOCKS = > 0x00000080 # > +DEFINE FLASH_NUM_BLOCKS = > 0x0000005E # > > #=============================================================== > ==================# > > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset = > 0x00000000 # Flash addr (0xFF800000) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset = > 0x00000000 # Flash addr (0xFFA20000) > SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageSize = > 0x00040000 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset = > 0x00000000 # Flash addr (0xFF800000) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset = > 0x00000000 # Flash addr (0xFFA20000) > SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize = > 0x0001E000 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset = > 0x0001E000 # Flash addr (0xFF81E000) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset = > +0x0001E000 # Flash addr (0xFFA3E000) > SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize > = 0x00002000 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset = > 0x00020000 # Flash addr (0xFF820000) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset = > 0x00020000 # Flash addr (0xFFA40000) > SET gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize = > 0x00020000 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset = > 0x00040000 # Flash addr (0xFF840000) > +SET gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageOffset = > 0x00040000 # Flash addr (0xFFA60000) > +SET gBoardModuleTokenSpaceGuid.PcdFlashNvDebugMessageSize = > 0x00010000 # > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset = > 0x00050000 # Flash addr (0xFFA70000) > SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize = > 0x00060000 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset = > 0x000A0000 # Flash addr (0xFF8A0000) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset = > 0x000B0000 # Flash addr (0xFFAD0000) > SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize = > 0x00070000 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset = > 0x00110000 # Flash addr (0xFF910000) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset = > 0x00120000 # Flash addr (0xFFB40000) > SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize = > 0x00090000 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset = > 0x001A0000 # Flash addr (0xFF9A0000) > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize = > 0x001E0000 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = > 0x00380000 # Flash addr (0xFFB80000) > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = > 0x00180000 # > -SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = > 0x00500000 # Flash addr (0xFFD00000) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset = > 0x001B0000 # Flash addr (0xFFBD0000) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize = > 0x00140000 # > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset = > 0x002F0000 # Flash addr (0xFFD10000) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize = > 0x000B0000 # > +SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvOffset = > 0x003A0000 # Flash addr (0xFFDC0000) > SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize = > 0x000A0000 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset = > 0x005A0000 # Flash addr (0xFFDA0000) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset = > 0x00440000 # Flash addr (0xFFE60000) > SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize = > 0x00060000 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset = > 0x00600000 # Flash addr (0xFFE00000) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset = > 0x004A0000 # Flash addr (0xFFEC0000) > SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize = > 0x000BC000 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset = > 0x006BC000 # Flash addr (0xFFEBC000) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset = > 0x0055C000 # Flash addr (0xFFF7C000) > SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize = > 0x00004000 # > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset = > 0x006C0000 # Flash addr (0xFFEC0000) > -SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize = > 0x00140000 # > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset = > 0x00560000 # Flash addr (0xFFF80000) > +SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize = > 0x00080000 # > diff --git a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/prebuild.bat > b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/prebuild.bat > index c09d2d5b16..c3360403f1 100644 > --- a/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/prebuild.bat > +++ b/Platform/Intel/ClevoOpenBoardPkg/N1xxWU/prebuild.bat > @@ -202,8 +202,8 @@ cl > > @set BIOS_SIZE_OPTION= > > -@REM default size option is 7M > -@set BIOS_SIZE_OPTION=-DBIOS_SIZE_OPTION=SIZE_70 > +@REM default size option is 6M > +@set BIOS_SIZE_OPTION=-DBIOS_SIZE_OPTION=SIZE_60 > > :BiosSizeDone > @echo BIOS_SIZE_OPTION=%BIOS_SIZE_OPTION% > -- > 2.16.2.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel