Patches 1 to 6 upgrade the FADT to ACPI 2.0 and present the PIIX3 Reset
Control Register in it.
Patches 7 and 8 make sure that the ResetSystem(EfiResetCold) runtime
service provided by OVMF utilizes the PIIX3 RCR too.
The series is bisectable.
I have tested the end result with Fedora 18, RHEL-6.3, and Windows 8
guests. At the end of this email the guest-visible FADTs are compared
(dumped in F18). Reset continues to work too when invoked from the Boot
Maintenance Manager.
Laszlo Ersek (8):
OvmfPkg: bump commonly used ACPI table revision numbers
OvmfPkg: fold macros of unsupported PM1b register blocks into
Facp.aslc
OvmfPkg: fold macros of unsupported PM2 control reg. block into
Facp.aslc
OvmfPkg: fold macros of unsupported GPE1 register block into
Facp.aslc
OvmfPkg: upgrade the FADT to ACPI 2.0 without functional changes
OvmfPkg: report support for the PIIX3 reset register in the FADT
OvmfPkg: attempt to trigger cold reset through PIIX3 reset control
register
OvmfPkg: make sure ResetCold() and ResetWarm() never return
OvmfPkg/AcpiTables/Platform.h | 34 ++++++++++-----
OvmfPkg/Library/ResetSystemLib/ResetSystemLib.c | 8 +++-
OvmfPkg/AcpiTables/Facp.aslc | 46 +++++++++++++-------
OvmfPkg/Library/ResetSystemLib/ResetSystemLib.inf | 2 +-
4 files changed, 60 insertions(+), 30 deletions(-)
--- before/FACP.dsl 2013-02-22 02:20:48.000000000 +0100
+++ after/FACP.dsl 2013-02-22 03:54:30.000000000 +0100
@@ -1,95 +1,171 @@
/*
* Intel ACPI Component Architecture
* AML Disassembler version 20090123
*
- * Disassembly of FACP.aml, Fri Feb 22 02:20:48 2013
+ * Disassembly of FACP.aml, Fri Feb 22 03:54:30 2013
*
* ACPI Data Table [FACP]
*
* Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
*/
[000h 000 4] Signature : "FACP" /* Fixed ACPI
Description Table */
-[004h 004 4] Table Length : 00000074
-[008h 008 1] Revision : 01
-[009h 009 1] Checksum : 98
+[004h 004 4] Table Length : 000000F4
+[008h 008 1] Revision : 03
+[009h 009 1] Checksum : 23
[00Ah 010 6] Oem ID : "OVMF "
[010h 016 8] Oem Table ID : "OVMFEDK2"
-[018h 024 4] Oem Revision : 20120804
+[018h 024 4] Oem Revision : 20130221
[01Ch 028 4] Asl Compiler ID : "OVMF"
-[020h 032 4] Asl Compiler Revision : 00000098
+[020h 032 4] Asl Compiler Revision : 00000099
[024h 036 4] FACS Address : 3FB63000
[028h 040 4] DSDT Address : 3FB5B000
-[02Ch 044 1] Model : 01
+[02Ch 044 1] Model : 00
[02Dh 045 1] PM Profile : 00
[02Eh 046 2] SCI Interrupt : 0009
[030h 048 4] SMI Command Port : 000000B2
[034h 052 1] ACPI Enable Value : F1
[035h 053 1] ACPI Disable Value : F0
[036h 054 1] S4BIOS Command : 00
[037h 055 1] P-State Control : 00
[038h 056 4] PM1A Event Block Address : 0000B000
[03Ch 060 4] PM1B Event Block Address : 00000000
[040h 064 4] PM1A Control Block Address : 0000B004
[044h 068 4] PM1B Control Block Address : 00000000
[048h 072 4] PM2 Control Block Address : 00000000
[04Ch 076 4] PM Timer Block Address : 0000B008
[050h 080 4] GPE0 Block Address : 0000AFE0
[054h 084 4] GPE1 Block Address : 00000000
[058h 088 1] PM1 Event Block Length : 04
[059h 089 1] PM1 Control Block Length : 02
[05Ah 090 1] PM2 Control Block Length : 00
[05Bh 091 1] PM Timer Block Length : 04
[05Ch 092 1] GPE0 Block Length : 04
[05Dh 093 1] GPE1 Block Length : 00
[05Eh 094 1] GPE1 Base Offset : 00
[05Fh 095 1] _CST Support : 00
[060h 096 2] C2 Latency : 0065
[062h 098 2] C3 Latency : 03E9
[064h 100 2] CPU Cache Size : 0000
[066h 102 2] Cache Flush Stride : 0000
[068h 104 1] Duty Cycle Offset : 00
[069h 105 1] Duty Cycle Width : 00
[06Ah 106 1] RTC Day Alarm Index : 00
[06Bh 107 1] RTC Month Alarm Index : 00
[06Ch 108 1] RTC Century Index : 00
[06Dh 109 2] Boot Flags (decoded below) : 0000
Legacy Devices Supported (V2) : 0
8042 Present on ports 60/64 (V2) : 0
VGA Not Present (V4) : 0
MSI Not Supported (V4) : 0
PCIe ASPM Not Supported (V4) : 0
[06Fh 111 1] Reserved : 00
-[070h 112 4] Flags (decoded below) : 000000A5
+[070h 112 4] Flags (decoded below) : 000004A5
WBINVD instruction is operational (V1) : 1
WBINVD flushes all caches (V1) : 0
All CPUs support C1 (V1) : 1
C2 works on MP system (V1) : 0
Control Method Power Button (V1) : 0
Control Method Sleep Button (V1) : 1
RTC wakeup reg not in fixed space (V1) : 0
RTC can wake system from S4 (V1) : 1
32-bit PM Timer (V1) : 0
Docking Supported (V1) : 0
- Reset Register Supported (V2) : 0
+ Reset Register Supported (V2) : 1
Sealed Case (V3) : 0
Headless - No Video (V3) : 0
Use native instr after SLP_TYPx (V3) : 0
PCIEXP_WAK Bits Supported (V4) : 0
Use Platform Timer (V4) : 0
RTC_STS valid on S4 wake (V4) : 0
Remote Power-on capable (V4) : 0
Use APIC Cluster Model (V4) : 0
Use APIC Physical Destination Mode (V4) : 0
+[074h 116 12] Reset Register : <Generic Address Structure>
+[074h 116 1] Space ID : 01 (SystemIO)
+[075h 117 1] Bit Width : 08
+[076h 118 1] Bit Offset : 00
+[077h 119 1] Access Width : 00
+[078h 120 8] Address : 0000000000000CF9
+
+[080h 128 1] Value to cause reset : 06
+[081h 129 3] Reserved : 000000
+[084h 132 8] FACS Address : 0000000000000000
+[08Ch 140 8] DSDT Address : 000000003FB5B000
+[094h 148 12] PM1A Event Block : <Generic Address Structure>
+[094h 148 1] Space ID : 01 (SystemIO)
+[095h 149 1] Bit Width : 20
+[096h 150 1] Bit Offset : 00
+[097h 151 1] Access Width : 00
+[098h 152 8] Address : 000000000000B000
+
+[0A0h 160 12] PM1B Event Block : <Generic Address Structure>
+[0A0h 160 1] Space ID : 00 (SystemMemory)
+[0A1h 161 1] Bit Width : 00
+[0A2h 162 1] Bit Offset : 00
+[0A3h 163 1] Access Width : 00
+[0A4h 164 8] Address : 0000000000000000
+
+[0ACh 172 12] PM1A Control Block : <Generic Address Structure>
+[0ACh 172 1] Space ID : 01 (SystemIO)
+[0ADh 173 1] Bit Width : 10
+[0AEh 174 1] Bit Offset : 00
+[0AFh 175 1] Access Width : 00
+[0B0h 176 8] Address : 000000000000B004
+
+[0B8h 184 12] PM1B Control Block : <Generic Address Structure>
+[0B8h 184 1] Space ID : 00 (SystemMemory)
+[0B9h 185 1] Bit Width : 00
+[0BAh 186 1] Bit Offset : 00
+[0BBh 187 1] Access Width : 00
+[0BCh 188 8] Address : 0000000000000000
+
+[0C4h 196 12] PM2 Control Block : <Generic Address Structure>
+[0C4h 196 1] Space ID : 00 (SystemMemory)
+[0C5h 197 1] Bit Width : 00
+[0C6h 198 1] Bit Offset : 00
+[0C7h 199 1] Access Width : 00
+[0C8h 200 8] Address : 0000000000000000
+
+[0D0h 208 12] PM Timer Block : <Generic Address Structure>
+[0D0h 208 1] Space ID : 01 (SystemIO)
+[0D1h 209 1] Bit Width : 20
+[0D2h 210 1] Bit Offset : 00
+[0D3h 211 1] Access Width : 00
+[0D4h 212 8] Address : 000000000000B008
+
+[0DCh 220 12] GPE0 Block : <Generic Address Structure>
+[0DCh 220 1] Space ID : 01 (SystemIO)
+[0DDh 221 1] Bit Width : 20
+[0DEh 222 1] Bit Offset : 00
+[0DFh 223 1] Access Width : 00
+[0E0h 224 8] Address : 000000000000AFE0
+
+[0E8h 232 12] GPE1 Block : <Generic Address Structure>
+[0E8h 232 1] Space ID : 00 (SystemMemory)
+[0E9h 233 1] Bit Width : 00
+[0EAh 234 1] Bit Offset : 00
+[0EBh 235 1] Access Width : 00
+[0ECh 236 8] Address : 0000000000000000
+
+
Raw Table Data
- 0000: 46 41 43 50 74 00 00 00 01 98 4F 56 4D 46 20 20 FACPt.....OVMF
- 0010: 4F 56 4D 46 45 44 4B 32 04 08 12 20 4F 56 4D 46 OVMFEDK2... OVMF
- 0020: 98 00 00 00 00 30 B6 3F 00 B0 B5 3F 01 00 09 00 .....0.?...?....
+ 0000: 46 41 43 50 F4 00 00 00 03 23 4F 56 4D 46 20 20 FACP.....#OVMF
+ 0010: 4F 56 4D 46 45 44 4B 32 21 02 13 20 4F 56 4D 46 OVMFEDK2!.. OVMF
+ 0020: 99 00 00 00 00 30 B6 3F 00 B0 B5 3F 00 00 09 00 .....0.?...?....
0030: B2 00 00 00 F1 F0 00 00 00 B0 00 00 00 00 00 00 ................
0040: 04 B0 00 00 00 00 00 00 00 00 00 00 08 B0 00 00 ................
0050: E0 AF 00 00 00 00 00 00 04 02 00 04 04 00 00 00 ................
0060: 65 00 E9 03 00 00 00 00 00 00 00 00 00 00 00 00 e...............
- 0070: A5 00 00 00 ....
+ 0070: A5 04 00 00 01 08 00 00 F9 0C 00 00 00 00 00 00 ................
+ 0080: 06 00 00 00 00 00 00 00 00 00 00 00 00 B0 B5 3F ...............?
+ 0090: 00 00 00 00 01 20 00 00 00 B0 00 00 00 00 00 00 ..... ..........
+ 00A0: 00 00 00 00 00 00 00 00 00 00 00 00 01 10 00 00 ................
+ 00B0: 04 B0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+ 00C0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+ 00D0: 01 20 00 00 08 B0 00 00 00 00 00 00 01 20 00 00 . ........... ..
+ 00E0: E0 AF 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
+ 00F0: 00 00 00 00 ....
------------------------------------------------------------------------------
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