Hi OVMF experts I'm trying to make OVMF work with Xen HVM and discover a possible bug in EDK2 OVMF. The root cause is that EmuVariableFvbRuntimeDxe sets FTW spare space base address to a not-aligned address. FTW refuses to initializes in that situation.
My quick hack seems to fix that, Xen HVM is not able to boot to internal EFI shell. But I'm sure whether that makes sense -- by far I only play with OVMF for 3 days and there's certainly a lot more for me to learn. I'm wondering how other platform works. If other platforms don't need this fix (hack) then that must be a configuration problem. If it is that case it would be great if you tell me where I can make sensible configuration. I've looked at those INF file but didn't have idea where I should change, it seems like the final placement is dynamically resulted from various previous placements. Thanks Wei. ----8<--- >From c2e3c03d13a1f1064fbc400c25e93f3703fbdae7 Mon Sep 17 00:00:00 2001 From: Wei Liu <[email protected]> Date: Tue, 1 Oct 2013 17:43:18 +0100 Subject: [PATCH] OvmfPkg: correctly align emulated NV storage Per 2c4b18e ("MdeModulePkg: Add the alignment check for FTW spare area address and length, and add the check for PcdFlashNvStorageVariableSize <= PcdFlashNvStorageFtwSpareSize."), FTWDxe refuses to initialize if spare space base address or size is not aligned to block size. In EmuVariableFvbRuntimeDxe, FTW spare space base is set to a SubPtr inside the emulated NV storage, which is possibly not aligned. Make it align to comply to the check. --- OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.c | 1 + 1 file changed, 1 insertion(+) diff --git a/OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.c b/OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.c index c7c3fcb..a345c92 100644 --- a/OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.c +++ b/OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.c @@ -868,6 +868,7 @@ FvbInitialize ( // Initialize the Fault Tolerant Write spare block // SubPtr = (VOID*) ((UINT8*) Ptr + EMU_FVB_BLOCK_SIZE); + SubPtr = (VOID*) (((UINTN) Ptr + EMU_FVB_BLOCK_SIZE) & ~(EMU_FVB_BLOCK_SIZE-1)); PcdSet32 (PcdFlashNvStorageFtwSpareBase, (UINT32)(UINTN) SubPtr); // -- 1.7.10.4 ------------------------------------------------------------------------------ October Webinars: Code for Performance Free Intel webinars can help you accelerate application performance. Explore tips for MPI, OpenMP, advanced profiling, and more. Get the most from the latest Intel processors and coprocessors. See abstracts and register > http://pubads.g.doubleclick.net/gampad/clk?id=60134791&iu=/4140/ostg.clktrk _______________________________________________ edk2-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/edk2-devel
