Changing topic..
Hi Oliver, Thanks. I also I have few separate questions wrt to Trusted firmware
& UEFI ARM code and hope you/others can help answer
* It seems there are two direction for SecureMonitor implementation. In
one implementation the SEC code (ArmPlatformPkg\Sec\Sec.c) install the secure
monitor ( when SEC start in El3) ; In other implementation the Trusted firmware
start first install secure monitor (bl31) and launch SEC in El1/2 mode. My
question is what is the preferred direction when both are possible? Should
secure monitor (bl31) be launched before or during SEC phase?
* Historically in x86 implementation the SMM mode hosts various runtime
platform BIOS driver for feature such as authentication variable (for secure
boot), platform runtime handing handling etc. EDKII has a good framework for
SMM kernel and loading various independent SMM driver and interaction among
those driver via protocol etc. In ARM based UEFI/Trusted firmware
implementation what may be preferred way to deal with such need. Should all
those UEFI SMM driver be ported to Trusted firmware which "today" is in
primitive framework compare to SMM EDKII foundation code, or some form of SMM
foundation can gel with trusted firmware design to allow independent platform
el3 code be developed at independent driver. Curious how others have attempted
to solve this problem and if there can be standard way for all of us to adopt
here. Before creating yet another method I was hoping to hear from experts on
any common ground for such feature implementation
Thanks again for all your help and comments
-Alok
-----Original Message-----
From: Olivier Martin [mailto:olivier.mar...@arm.com]
Sent: Wednesday, December 04, 2013 7:40 AM
To: tiger...@viatech.com.cn; edk2-devel@lists.sourceforge.net
Subject: Re: [edk2] SEC code support big.LITTLE tech?
Hi Tiger,
The ARM recommendation to manage secondary CPUs (the primary CPU is the CPU
that runs UEFI and starts your OS kernel) is to use PSCI (Power State
Coordination Interface -
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.den0022b/index.h
tml).
PSCI uses SMCs (Secure Memory Calls) to bring up secondary CPUs (CPU_UP /
CPU_DOWN). This code runs in Secure World while UEFI runs in Non-Secure World.
For the story... I started to implement PSCI support in Tianocore source code
(in ArmPlatformPkg/Sec). But the EDK2 framework (PCD/Library/INF/FDF
etc) had made the code quite hard to maintain.
So, I wrote a new secure firmware framework project to handle this support.
This firmware is not Open Source (available in binary format for TC2 only).
A new project has been started by ARM Ltd last month. It is an Open Source
implementation of the Trusted/Secure Firmware:
https://github.com/ARM-software/arm-trusted-firmware
Unfortunately at this stage, 32bit is not supported (only AArch64 is
supported). And as far as I know there is no plan to add 32bit support by ARM
Ltd in the short term.
The current ArmPlatformPkg/Sec has support to hold the secondary cores in WFI.
But it does not support PSCI. The current support might be sufficient enough
for you at this stage.
Thanks,
Olivier
> -----Original Message-----
> From: tiger...@viatech.com.cn<mailto:tiger...@viatech.com.cn>
> [mailto:tiger...@viatech.com.cn]
> Sent: 04 December 2013 01:51
> To: edk2-devel@lists.sourceforge.net<mailto:edk2-devel@lists.sourceforge.net>
> Cc: Olivier Martin
> Subject: [edk2] SEC code support big.LITTLE tech?
>
> Hi, Oliver:
> Does current ArmPlatformPackage's sec code support big.LITTLE tech?
> Such as :
> An ARM SOC --- with 4 Cores Cortex-A15, 4 Cores Cortex-A7
>
> So, if sec code support big.LITTLE tech, how does it let one core as
> boot strap cpu, others go into wfe(or other sleeping state)?
>
> Best wishes,
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