From: Konstantin Filatov <kfila...@parallels.com>
This timeout was wrong in 1000 times.
Delay is calculated using timeout value in seconds.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Konstantin Filatov <kfila...@parallels.com>
Signed-off-by: Mike Maslenkin <miha...@parallels.com>
---
IntelFrameworkModulePkg/Bus/Isa/IsaFloppyDxe/IsaFloppyCtrl.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/IntelFrameworkModulePkg/Bus/Isa/IsaFloppyDxe/IsaFloppyCtrl.c
b/IntelFrameworkModulePkg/Bus/Isa/IsaFloppyDxe/IsaFloppyCtrl.c
index d8f181c2e25f..e1f48568b6f9 100644
--- a/IntelFrameworkModulePkg/Bus/Isa/IsaFloppyDxe/IsaFloppyCtrl.c
+++ b/IntelFrameworkModulePkg/Bus/Isa/IsaFloppyDxe/IsaFloppyCtrl.c
@@ -1112,7 +1112,7 @@ FddWaitForBSYClear (
//
Mask = (UINT8) ((FdcDev->Disk == FdcDisk0 ? MSR_DAB : MSR_DBB) | MSR_CB);
- Delay = ((TimeoutInSeconds * STALL_1_MSECOND) / 50) + 1;
+ Delay = ((TimeoutInSeconds * STALL_1_SECOND) / 50) + 1;
do {
StatusRegister = FdcReadPort (FdcDev, FDC_REGISTER_MSR);
if ((StatusRegister & Mask) == 0x00) {
@@ -1169,7 +1169,7 @@ FddDRQReady (
//
// in order to compare bit6
//
- Delay = ((TimeoutInSeconds * STALL_1_MSECOND) / 50) + 1;
+ Delay = ((TimeoutInSeconds * STALL_1_SECOND) / 50) + 1;
do {
StatusRegister = FdcReadPort (FdcDev, FDC_REGISTER_MSR);
if ((StatusRegister & MSR_RQM) == MSR_RQM && (StatusRegister & MSR_DIO) ==
DataInOut) {
--
1.7.10.4
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