From: Reza Jelveh <[email protected]>

Several Ahci controllers including Qemu and several ARM devices send
device commands such as identify asynchronously, which leads to the D2H
register being set.

AtaAtapiPassThru interprets a D2H regardless of the status code as
error therefore failing to detect and enable ahci mode.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Reza Jelveh <[email protected]>
---
 MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c | 8 +++++++-
 MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h | 2 ++
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c 
b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
index 7fc7a28..c19de1d 100644
--- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
+++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
@@ -703,6 +703,7 @@ AhciPioTransfer (
   EFI_AHCI_COMMAND_LIST         CmdList;
   UINT32                        PortTfd;
   UINT32                        PrdCount;
+  UINT8                         D2HStatus;
   BOOLEAN                       InfiniteWait;
 
   if (Timeout == 0) {
@@ -804,7 +805,12 @@ AhciPioTransfer (
       Offset = FisBaseAddr + EFI_AHCI_D2H_FIS_OFFSET;
       Status = AhciCheckMemSet (Offset, EFI_AHCI_FIS_TYPE_MASK, 
EFI_AHCI_FIS_REGISTER_D2H, NULL);
       if (!EFI_ERROR (Status)) {
-        Status = EFI_DEVICE_ERROR;
+        D2HStatus  = ((UINT8 *)(UINTN)(FisBaseAddr + 
EFI_AHCI_D2H_FIS_OFFSET))[2];
+
+        if (D2HStatus & EFI_AHCI_FIS_STATUS_ERROR) {
+          Status = EFI_DEVICE_ERROR;
+        }
+
         break;
       }
 
diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h 
b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h
index 485b647..3eb0260 100644
--- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h
+++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h
@@ -84,6 +84,8 @@ typedef union {
 #define EFI_AHCI_FIS_TYPE_MASK                 0xFF
 #define EFI_AHCI_U_FIS_OFFSET                  0x60
 
+#define EFI_AHCI_FIS_STATUS_ERROR              0x01
+
 //
 // Port register
 //
-- 
1.9.2


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