MdeModulePkg: Add MdeModulePkg/Include/Ppi/SmmControl2.h

Add PPI definition for SMM Control 2 Protocol interface equivalent
to that found in MdePkg/Include/Protocol/SmmControl2.h.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Garrett Kirkendall <garrett.kirkendall@amd.com>

Index: MdeModulePkg/Include/Ppi/SmmControl2.h
===================================================================
--- MdeModulePkg/Include/Ppi/SmmControl2.h	(revision 0)
+++ MdeModulePkg/Include/Ppi/SmmControl2.h	(working copy)
@@ -0,0 +1,107 @@
+/** @file
+  EFI SMM Control2 PPI definition.
+
+  This PPI is used to initiate SMI/PMI activations. This protocol could be published by either:
+  - A processor driver to abstract the SMI/PMI IPI
+  - The driver that abstracts the ASIC that is supporting the SMI port
+  Because of the possibility of performing SMI or PMI IPI transactions, the ability to generate this
+  event from a platform chipset agent is an optional capability.
+
+  Copyright (c) 2014, ADVANCED MICRO DEVICES, INC. All rights reserved.<BR>
+
+  This program and the accompanying materials
+  are licensed and made available under the terms and conditions
+  of the BSD License which accompanies this distribution.  The
+  full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _SMM_CONTROL2_PPI_H_
+#define _SMM_CONTROL2_PPI_H_
+
+#include <PiPei.h>
+
+#define PEI_SMM_CONTROL2_PPI_GUID \
+  { \
+    0x8B2C1BFC, 0x4DDE, 0xF12C, {0xE0, 0xA2, 0xF2, 0xB1, 0x14, 0x9B, 0x68, 0x42} \
+  }
+
+typedef struct _PEI_SMM_CONTROL2_PPI  PEI_SMM_CONTROL2_PPI;
+typedef UINTN  PEI_SMM_PERIOD;
+
+/**
+  Invokes SMI activation from PEI environment.
+
+  This function generates an SMI.
+
+  @param[in]     PeiServices         General purpose services available to every PEIM.
+  @param[in]     This                The PEI_SMM_CONTROL2_PPI instance.
+  @param[in,out] CommandPort         The value written to the command port.
+  @param[in,out] DataPort            The value written to the data port.
+  @param[in]     Periodic            Optional mechanism to engender a periodic stream.
+  @param[in]     ActivationInterval  Optional parameter to repeat at this period one
+                                     time or, if the Periodic Boolean is set, periodically.
+
+  @retval EFI_SUCCESS            The SMI/PMI has been engendered.
+  @retval EFI_DEVICE_ERROR       The timing is unsupported.
+  @retval EFI_INVALID_PARAMETER  The activation period is unsupported.
+  @retval EFI_INVALID_PARAMETER  The last periodic activation has not been cleared. 
+  @retval EFI_NOT_STARTED        The SMM base service has not been initialized.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PEI_SMM_ACTIVATE2) (
+  IN CONST EFI_PEI_SERVICES     **PeiServices,
+  IN PEI_SMM_CONTROL2_PPI       *This,
+  IN OUT UINT8                  *CommandPort        OPTIONAL,
+  IN OUT UINT8                  *DataPort           OPTIONAL,
+  IN BOOLEAN                    Periodic            OPTIONAL,
+  IN UINTN                      ActivationInterval  OPTIONAL
+  );
+
+/**
+  Clears any system state that was created in response to the Trigger() call.
+
+  This function acknowledges and causes the deassertion of the SMI activation source.
+
+  @param[in]     PeiServices         General purpose services available to every PEIM.
+  @param[in]     This                The PEI_SMM_CONTROL2_PPI instance.
+  @param[in]     Periodic            Optional parameter to repeat at this period one time
+
+  @retval EFI_SUCCESS            The SMI/PMI has been engendered.
+  @retval EFI_DEVICE_ERROR       The source could not be cleared.
+  @retval EFI_INVALID_PARAMETER  The service did not support the Periodic input argument.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PEI_SMM_DEACTIVATE2) (
+  IN CONST EFI_PEI_SERVICES     **PeiServices,
+  IN PEI_SMM_CONTROL2_PPI       *This,
+  IN BOOLEAN                    Periodic            OPTIONAL
+  );
+
+///
+/// The PEI_SMM_CONTROL2_PPI is produced by a PEIM driver. It provides  an 
+/// abstraction of the platform hardware that generates an SMI.  There are often I/O ports that, when 
+/// accessed, will generate the SMI.  Also, the hardware optionally supports the periodic generation of 
+/// these signals.
+///
+struct _PEI_SMM_CONTROL2_PPI {
+  PEI_SMM_ACTIVATE2    Trigger;
+  PEI_SMM_DEACTIVATE2  Clear;
+  ///
+  /// Minimum interval at which the platform can set the period.  A maximum is not 
+  /// specified in that the SMM infrastructure code can emulate a maximum interval that is 
+  /// greater than the hardware capabilities by using software emulation in the SMM 
+  /// infrastructure code.
+  ///
+  PEI_SMM_PERIOD      MinimumTriggerPeriod;
+};
+
+extern EFI_GUID gPeiSmmControl2PpiGuid;
+
+#endif
Index: MdeModulePkg/MdeModulePkg.dec
===================================================================
--- MdeModulePkg/MdeModulePkg.dec	(revision 15792)
+++ MdeModulePkg/MdeModulePkg.dec	(working copy)
@@ -304,6 +304,9 @@
   ## Include/Ppi/SmmControl.h
   gPeiSmmControlPpiGuid         =  { 0x61c68702, 0x4d7e, 0x4f43, { 0x8d, 0xef, 0xa7, 0x43, 0x5, 0xce, 0x74, 0xc5 }}
 
+  ## Include/Ppi/SmmControl2.h
+  gPeiSmmControl2PpiGuid        =  { 0x8B2C1BFC, 0x4DDE, 0xF12C, { 0xE0, 0xA2, 0xF2, 0xB1, 0x14, 0x9B, 0x68, 0x42 }}
+
   ## Include/Ppi/PostBootScriptTable.h
   gPeiPostScriptTablePpiGuid    =  { 0x88c9d306, 0x900, 0x4eb5, { 0x82, 0x60, 0x3e, 0x2d, 0xbe, 0xda, 0x1f, 0x89}}