The current coreboot UEFI payload has an assumption that all interrupt
sources should be masked off before transferring control to the payload.
However, it is not the case on some platforms, such as QEMU. It will
cause boot failure due to unexpected pending interrupt in the payload.
To resolve it all legacy 8259 interrupt sources need to be masked piror
to the DXE phase. The fix was tested on QEMU virtual platform.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Maurice Ma <maurice...@intel.com>
---
CorebootModulePkg/CbSupportPei/CbSupportPei.c | 13 +++++++++++--
CorebootModulePkg/CbSupportPei/CbSupportPei.h | 3 ++-
CorebootModulePkg/CbSupportPei/CbSupportPei.inf | 3 ++-
3 files changed, 15 insertions(+), 4 deletions(-)
diff --git a/CorebootModulePkg/CbSupportPei/CbSupportPei.c
b/CorebootModulePkg/CbSupportPei/CbSupportPei.c
index 148062f..8ec7ba8 100644
--- a/CorebootModulePkg/CbSupportPei/CbSupportPei.c
+++ b/CorebootModulePkg/CbSupportPei/CbSupportPei.c
@@ -2,7 +2,7 @@
This PEIM will parse coreboot table in memory and report resource
information into pei core.
This file contains the main entrypoint of the PEIM.
-Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD
License
which accompanies this distribution. The full text of the license may be
found at
@@ -14,6 +14,9 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
EXPRESS OR IMPLIED.
**/
#include "CbSupportPei.h"
+#define LEGACY_8259_MASK_REGISTER_MASTER 0x21
+#define LEGACY_8259_MASK_REGISTER_SLAVE 0xA1
+
EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation[] = {
{ EfiACPIReclaimMemory, 0x008 },
{ EfiACPIMemoryNVS, 0x004 },
@@ -374,7 +377,13 @@ CbPeiEntryPoint (
CopyMem (pFbInfo, &FbInfo, sizeof (FRAME_BUFFER_INFO));
DEBUG ((EFI_D_ERROR, "Create frame buffer info guid hob\n"));
}
-
+
+ //
+ // Mask off all legacy 8259 interrupt sources
+ //
+ IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0xFF);
+ IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0xFF);
+
return EFI_SUCCESS;
}
diff --git a/CorebootModulePkg/CbSupportPei/CbSupportPei.h
b/CorebootModulePkg/CbSupportPei/CbSupportPei.h
index 5448385..3c9a3fe 100644
--- a/CorebootModulePkg/CbSupportPei/CbSupportPei.h
+++ b/CorebootModulePkg/CbSupportPei/CbSupportPei.h
@@ -1,7 +1,7 @@
/** @file
The header file of Coreboot Support PEIM.
-Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD
License
which accompanies this distribution. The full text of the license may be
found at
@@ -27,6 +27,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
EXPRESS OR IMPLIED.
#include <Library/PcdLib.h>
#include <Library/CbParseLib.h>
#include <Library/MtrrLib.h>
+#include <Library/IoLib.h>
#include <Guid/SmramMemoryReserve.h>
#include <Guid/MemoryTypeInformation.h>
diff --git a/CorebootModulePkg/CbSupportPei/CbSupportPei.inf
b/CorebootModulePkg/CbSupportPei/CbSupportPei.inf
index 9328151..b88b6f0 100644
--- a/CorebootModulePkg/CbSupportPei/CbSupportPei.inf
+++ b/CorebootModulePkg/CbSupportPei/CbSupportPei.inf
@@ -4,7 +4,7 @@
# Parses coreboot table in memory and report resource information into pei
core. It will install
# the memory as required.
#
-# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD
License
@@ -51,6 +51,7 @@
PcdLib
CbParseLib
MtrrLib
+ IoLib
[Guids]
gEfiSmmPeiSmramMemoryReserveGuid
--
1.8.3.1
------------------------------------------------------------------------------
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