Build the memory HOBs in a tight block, in increasing base address order.
Cc: Maoming <maoming.maom...@huawei.com>
Cc: Huangpeng (Peter) <peter.huangp...@huawei.com>
Cc: Wei Liu <wei.l...@citrix.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <ler...@redhat.com>
Tested-by: Maoming <maoming.maom...@huawei.com>
Reviewed-by: Jordan Justen <jordan.l.jus...@intel.com>
---
OvmfPkg/PlatformPei/MemDetect.c | 9 ++++-----
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c
index ceff1e2..b74308f 100644
--- a/OvmfPkg/PlatformPei/MemDetect.c
+++ b/OvmfPkg/PlatformPei/MemDetect.c
@@ -265,8 +265,11 @@ QemuInitializeRam (
//
// Create memory HOBs
//
- AddMemoryRangeHob (BASE_1MB, LowerMemorySize);
AddMemoryRangeHob (0, BASE_512KB + BASE_128KB);
+ AddMemoryRangeHob (BASE_1MB, LowerMemorySize);
+ if (UpperMemorySize != 0) {
+ AddUntestedMemoryBaseSizeHob (BASE_4GB, UpperMemorySize);
+ }
}
MtrrSetMemoryAttribute (BASE_1MB, LowerMemorySize - BASE_1MB,
CacheWriteBack);
@@ -274,10 +277,6 @@ QemuInitializeRam (
MtrrSetMemoryAttribute (0, BASE_512KB + BASE_128KB, CacheWriteBack);
if (UpperMemorySize != 0) {
- if (mBootMode != BOOT_ON_S3_RESUME) {
- AddUntestedMemoryBaseSizeHob (BASE_4GB, UpperMemorySize);
- }
-
MtrrSetMemoryAttribute (BASE_4GB, UpperMemorySize, CacheWriteBack);
}
}
--
1.8.3.1
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