I'm about to install the REMIOUPDG replacement KIO3 digital i/o assembly. The instruction sheet (Rev B) includes a step which involves cutting 2 traces on the main RF board leading to pins 11 and 12 on P51, VFWD and VREFL. The instructions state that this "ensures the digital-to-analog converters (DACs) always receive the proper signal levels". A look at the schematic indicates that this mod is breaking the connection between these nets and U6 (analog mux) on the RF board. These signals seem to be the forward and reflected power outputs of the SWR bridge and are inputs to U8, a ADC78H90C ADC on the DSP board. So the instruction should perhaps read "analog-to-digital converters (ADCs)" unless I'm missing something.
Indeed, the latest schematic warns "Vfwd/Vrefl traces @P51 must be cut on rev A PCB". Is the purpose simply to prevent saturation of the ADC input an thus inaccurate Power/SWR computations? Or is there more the story? What happens if it's not done? Just curious, I've been running these 2 K3 for over 2 years now without apparent trouble, and this change appears to have a purpose independent of the main purpose of the REMIOUPDG update (negative going ALC and band data output pullup mods). Bob NW8L ______________________________________________________________ Elecraft mailing list Home: http://mailman.qth.net/mailman/listinfo/elecraft Help: http://mailman.qth.net/mmfaq.htm Post: mailto:Elecraft@mailman.qth.net This list hosted by: http://www.qsl.net Please help support this email list: http://www.qsl.net/donate.html
