On Mar 10, 11:25 pm, war_of_justice <[email protected]> wrote: > Hi all > > In C5_models, the process is for 5 volt application. If I am using a > VDD of 3V, can I still use this process? I tried to draw an inverter > using 3V and it seems to work for the inverter. > > Regards > Weiyi
Yes it will work: http://www.onsemi.com/PowerSolutions/content.do?id=16634 You should always refer to the process sheet for information about the core voltages and I/O tolerant voltages. Keep in mind that with lower VDD, your circuit will run slower (due to smaller current and more time to charge/discharge the capacitance). But the good news is it consumes less power also. -- You received this message because you are subscribed to the Google Groups "Electric VLSI Editor" group. To post to this group, send email to [email protected]. To unsubscribe from this group, send email to [email protected]. For more options, visit this group at http://groups.google.com/group/electricvlsi?hl=en.
