I am a rookie.I am working on a project, its layout design of 4:1 Multiplexer. I have planned to make it using three 2:1multiplexers. I made a cell for 2:1 mux in electric vlsi 9.01 There's no DRC error. I did "compaction" (there's an option in electric). But there's ERC well check error as well as are coverage error. Why's that? I can send you the library file so that you can suggest me something.
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