Electric has a rule that two unconnected pieces
of circuitry with the same net name are
considered to be connected BUT ONLY IN
SCHEMATICS. This makes sense because schematics
users always do that: connect things by giving them the same name.
However, in layout, connectivity is only possibly
through actual geometry, not symbolically. There
are workarounds, such as the NCC annotation that
tells the system that connectivity WILL be
established at a higher level of the hierarchy.
You can also use "universal" wires from the
Generic technology to connect circuitry in your
layout. DRC will then think it is connected and
use the proper rules. In general, however, if you
want your layout to be connected, you have to connect it.
-Steven Rubin
At 08:41 AM 6/29/2014, you wrote:
On Sunday, June 29, 2014 1:19:59 PM UTC+2, Jack Jost wrote:
Is the "exportsConnectedByParent"-annotation
providing what you need (user manual section 9−7−4: Annotations, p. 340)?
That looks nice but is for schematics while I'm
only using layout, my issue is with DRC, not with NCC.
Also that's limited to vdd and gnd explicitly
while I'm looking for a generic way to assign
the same netname to lines in a "virtual shortcut" fashion.
--
Andrea
--
You received this message because you are
subscribed to the Google Groups "Electric VLSI Editor" group.
To unsubscribe from this group and stop
receiving emails from it, send an email to
<mailto:[email protected]>[email protected].
For more options, visit
<https://groups.google.com/d/optout>https://groups.google.com/d/optout.
--
You received this message because you are subscribed to the Google Groups "Electric
VLSI Editor" group.
To unsubscribe from this group and stop receiving emails from it, send an email
to [email protected].
For more options, visit https://groups.google.com/d/optout.
