It's a good start; I'd like to see more information on taking a design all the way through MOSIS to get some working chips.
On Wed, Mar 8, 2017 at 11:51 AM, Diego Deotti <[email protected]> wrote: > Very good! > > Thank you! > > > > > > *____________________________________________AMS DesignerMaster candidate > at unicampMobile/Celular 19 98123-8662* > *Skype: diegodeotti* > > 2017-03-08 15:55 GMT-03:00 izmirli <[email protected]>: > >> maybe helpful for you... >> >> >> http://www.idea2ic.com/ELECTRIC_TEMPLATES/TAPEOUT_USING_ELECTRIC.html >> >> best wishes >> >> -- >> You received this message because you are subscribed to the Google Groups >> "Electric VLSI Editor" group. >> To unsubscribe from this group and stop receiving emails from it, send an >> email to [email protected]. >> For more options, visit https://groups.google.com/d/optout. >> > > -- > You received this message because you are subscribed to the Google Groups > "Electric VLSI Editor" group. > To unsubscribe from this group and stop receiving emails from it, send an > email to [email protected]. > For more options, visit https://groups.google.com/d/optout. > -- You received this message because you are subscribed to the Google Groups "Electric VLSI Editor" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
