I think that adding MiM capacitors to MOCMOS tech is a reasonable thing, but the capacitor bottom plate layer number (CAP_TOP_METAL) depends on number of layers in particular tech (say SCN6M).
Do I need to add capacitors both for CAP_TOP_METAL==4 and CAP_TOP_METAL==5 to mocmos.xml ??? Or some other approach is to be used for this technology dependence??? Here https://bears.ece.ucsb.edu/class/ece224a/scmos/scmos-captop.html and here https://bears.ece.ucsb.edu/class/ece224a/scmos/scmos-main.html#subm we can see that additional metal number CAP_TOP_METAL which is used for MiM capacitor depends on the total number of metal layers * Process Bottom Plate Top Plate Top Plate Contact TSMC_025 METAL4 CAP_TOP_METAL VIA4 and METAL5 TSMC_018 METAL5 CAP_TOP_METAL VIA5 and METAL6 * SkyWater130 PDK supports particular types of MiM capatcitors ( https://skywater-pdk.readthedocs.io/en/latest/rules/device-details.html), that can be generated with Adam's tool https://gitlab.com/westernsemico/com.westernsemico.vlsiI didn't learn how to code in the tools' source yet For SkyWater we can code particular metal as CAP_TOP_METAL, so no logical problems with it -- You received this message because you are subscribed to the Google Groups "Electric VLSI Editor" group. To unsubscribe from this group and stop receiving emails from it, send an email to electricvlsi+unsubscr...@googlegroups.com. To view this discussion on the web visit https://groups.google.com/d/msgid/electricvlsi/CACoSTqLh-Scseib%3DomwUVAKHVH5dPN0p3FLZJXshRkAqzkQSFw%40mail.gmail.com.
