On Tue, 27 Sep 2011, s...@highlab.com wrote:
> Date: Tue, 27 Sep 2011 21:48:28 -0600
> From: "[utf-8] s...@highlab.com" <s...@highlab.com>
> To: "[utf-8] Peter C. Wallace" <p...@mesanet.com>,
> "[utf-8] EMC developers" <emc-developers@lists.sourceforge.net>
> Subject:
> =?utf-8?B?UmU6IFtFbWMtZGV2ZWxvcGVyc10gRlc6IFtFbWMtdXNlcnNdIGJ1ZyhzKSBpbiAy
> LjQuNiB1c2luZwlHYW50cnlraW5zPw==?=
>
> It'd be convenient if the stepgen module provided a TSC register like the
> Quadrature Counter module, then we could just use that. If it counted
> microseconds, 16 bits would be plenty.
Thats easily do-able but I have some reservations
1. Some 5I20 stepgen configs are really close to being full. Its possible a
TSC would put some over the top so it would be good if driver code could
support TSC and non TSC stepgens.
2. Calibration is likely still desireable even with the TSC to make sure that
the stepgens clock (or TSC) is close to whatever generates the PCs servo
thread (8253?)
Peter Wallace
Mesa Electronics
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