I am looking back through some code I wrote almost exactly a year ago
which offers an interface in Hostmto2 to the Mesa card UARTS
Like the BSPI interface it will require people to write a .comp (or C)
sub-driver as accessing a FIFO through a HAL pin isn't really flexible
enough to be much use.
I can imagine it being useful for all sorts of things, but Modbus
springs to mind. It can run rather fast.

I modelled it on the BSPI driver structure, but I am not sure it needs
to be so complex.
With BSPI the traffic is handled by TRAM, and the BSPI read/write
functions are registered with the main Hostmot2 driver, and are called
as part of the hm2_pci.xixx.read and hm2_pci.xixx.write functions.
I think perhaps it makes more sense for the serial UART HAL drivers to
bypass TRAM and to simply export their own .read and .write functions.
This means that the main Hostmot2 driver only creates an internal data
structure for the UARTs, give them names (for the HAL sub-driver to
access them through) and then takes no further part in controlling the
UART until shutdown and cleanup.

TRAM is based on the assumption of one read or write per thread
invocation, and that doesn't really suit a FIFO like hm2_uart.

The drawback is that if the HAL Hostmot2 driver is ever made to use
TRAM and DMA then hm2_uart won't be part of that structure.

An example if the BSPI-way of doing things can be seen in the
mesa_7i65 component (in master) which doesn't actually export any
functions to HAL, but is itself called by Hostmot2.

I think UART can be much simpler.

-- 
atp
If you can't fix it, you don't own it.
http://www.ifixit.com/Manifesto

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