On 3/27/2013 9:53 AM, Michael Haberler wrote:
> 
> Am 27.03.2013 um 14:55 schrieb Kent A. Reed:

<snip>

>> The curmudgeon in me worries we're trying to out-ski an avalanche. 
>> Exhilarating for as long as it's still behind you; crushing once it 
>> catches up.
> 
> Well I dont see really that many different patterns:
> 
> - shared memory between RTAPI and the device, pin-structured or otherwise (eg 
> some arbitrary data type not fitting the HAL type model)
> - some type of I/O memory
> - some kind of queue, where the HAL ringbuffer might fit in, provided the 
> device behavior is programmable

Programmable?  IMHO, we're approaching the point where HAL and the
motion control logic can all be 'virtual'.  Glue together some I/O from
the HostMot2 VHDL, instantiate a soft-core CPU/DSP of your preference
optimized for real-time control, and pour it all into the FPGA gates of
your choice living next to some hyper-speed CPU/GPU running Linux.

The Altera and Xilinx SoC parts are the first headed this direction, but
I don't expect they'll be the last.  As the penalty for using
programmable logic diminishes with the relentless forward march of
technology, you'll start seeing parts like this showing up in cell
phones and DVD players (er...make that Blu-Ray).

> - register polling, which could be memory access or some I/O instruction like 
> inb/outb
> - interrupts, which are probably not a good idea

Register poling and interrupts?!?

<bah>  Just let the hardware take care of it.  :)

Seriously, the problem of crunching an algorithm into something that
runs efficiently on a 1000+ core machine is going to be solved, and it's
a short step from there to directly instantiating hardware gates you can
pour into an FPGA.  The future is going to be "Star Trek" programmable,
where you can drag a few images around on a screen and turn your shields
and long-range scanner into a tractor beam.

-- 
Charles Steinkuehler
char...@steinkuehler.net

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