On Tue, 4 Feb 2020 at 16:09, Jon Elson <[email protected]> wrote: > On 02/04/2020 05:33 AM, andy pugh wrote: > > Rigid tapping and threading reset at the start of the > > cycle, so are probably OK. > Ahh, but that led to a bunch of confusion years ago, when > the 32-bit extended software bits of > the 24-bit hardware counter was not properly zeroed out
What I mean is that 32-bit overflow is not likely to be a problem during a rigid tapping move, assuming that index-zero works properly. (Though in my Mesa drivers the index actually just sets an offset, and rawcounts continue to accumulate). -- atp "A motorcycle is a bicycle with a pandemonium attachment and is designed for the especial use of mechanical geniuses, daredevils and lunatics." — George Fitch, Atlanta Constitution Newspaper, 1912 _______________________________________________ Emc-developers mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/emc-developers
