> On 25. Mar 2020, at 22:10, Peter C. Wallace <p...@mesanet.com> wrote: > > On Wed, 25 Mar 2020, Curtis Dutton wrote: > >> Date: Wed, 25 Mar 2020 14:02:39 -0400 >> From: Curtis Dutton <curtd...@gmail.com> >> Reply-To: EMC developers <emc-developers@lists.sourceforge.net> >> To: EMC developers <emc-developers@lists.sourceforge.net> >> Subject: Re: [Emc-developers] pktuart -> rs-485 >> Apologies. It is a 7i74 not a 7i84. > > BTW a simple way to bisect the testing process is to simply loop back the > FPGA TX line to the FPGA RX line, to eliminate any issues with TXEN, > polarities, RS-485 driver hookup etc etc
I explained it already, yaskawa is not a uart, its hdlc over Manchester over rs485. It cannot work with the pkguart or ssi driver. To get it to work with a mesa card requires a new vhdl module. It requires clock recovery, so you can’t even just pick bits at times. This is my implementation in the Stmbl: https://github.com/rene-dev/stmbl/blob/master/src/comps/yaskawa.c#L85 <https://github.com/rene-dev/stmbl/blob/master/src/comps/yaskawa.c#L85> Its decoded with clock recovery by using a timer chained to a dma channel, which ends up with a run length encoding in memory. The request is also generated with the dma. I can make a pcb that converts all the fb systems the Stmbl supports to sserial. > > > Peter Wallace > Mesa Electronics > > > _______________________________________________ > Emc-developers mailing list > Emc-developers@lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/emc-developers _______________________________________________ Emc-developers mailing list Emc-developers@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/emc-developers
