To All: I am currently in process of getting a computer product UL Listed and TUV Certified and the two agencies have quite different interpretations of the interlock requirements from UL 1950 and EN60950. I am looking for input for both sides of this argument in an effort to try and resolve the issue.
The power supply has a logic circuit with an input signal INHIBIT. When a logic high (+5v) is applied to INHIBIT the supply output is enabled and likewise when the signal goes low the supply output is shutdown. Our interlock switch is used to open and close the 5v for this INHIBIT signal therefore the switch is located in a 5 vdc, 30 mA secondary circuit. In para 2.8.6.1 regarding contact gap it is clear that in primary the gap must be 3mm, same as a disconnect device. For other circuits it refers you to the clearance requirements in Table 5 of 2.9. This is where the argument begins. What column in the table is to be used and what insulation category ? TUV says use the right most column for secondary circuits not subject to transients and meeting the conditions of note 4. TUV says this is an operational insulation requirement since I am not separating different circuits but only providing for the proper operation of the circuit. TUV's conclusion is 0.4mm contact gap required. UL says I must use the column for nominal mains between 150- 300 V, pollution degree 2, reinforced insulation. They argue I have no way of knowing that the secondary is not subject to transients and it must be reinforced insulation since the interlock is protecting operator access to energy hazards which requires two levels of protection. This would require a contact gap of 2.0mm as opposed to 0.4mm from TUV. I pointed out that if the switch were located in primary that I would only be required to meet 3mm which is not the 4mm required by reinforced, so why would a 5 vdc, 30 mA circuit be required to meet reinforced? The only explaination that I got was that 3mm had been determined sufficient for primary. The problem gets even stickier when you go to para 2.8.6.3 for dielectric testing. The para specifically states perform the test in 5.3 for reinforced insulation. Going to 5.3, there is no test for reinforced insulation in 5 v secondary circuits. TUV says OK, the standard says no test. UL says, that can't be right so we want you to do 500 v for operational insulation! HEEEELP! All input to this issue would be very much appreciated for either case. I would just like to get some level of clarity to help get the agencies on some common ground on this issue for now and future submittals. Thanks in advance for the help. Steve Hackett NCR Corporation - Columbia, SC [email protected]
