Don, You'll open a can of worms with this one.
The worst problems I've seen with I/O were when the ground was isolated. Why? Because the bypass capacitor return path was also isolated. I actually had a (manufacturer name here) computer board where the last two or three pins on one end of a connector were responsible for failing the system, and the "cure" was to add a jumper tying local ground on that end to the main circuit board ground plane. You can guess where my vote goes. However... if you don't want ESD running around on the board, then you have to make sure it dumps into chassis, not the main PWB, and short of a good mechanical job with finger-stock, about the only way to be sure of THAT is, isolate the ground area where you want ESD currents to flow. For that reason, I like to combine series elements --r resistors,ferrites -- with non0isolated I/O ground return, and then tie the chassis and the PWB to ground as tightly as possible near the I/O. Isolated ground islands on board interior areas are another thing that has me uneasy, not because they _can't_ work, but because when you do use them, you have got to solve all of the same problems the board has, on a small area with a low parts count. If there is a trace of ground bounce _in the island_ then all its signal lines will distribute the problem around the board. Guess what? I've seen problems that went away when the ferrite bead used to isolate a ground island was replaced with a 0 ohm resistor. Well, maybe they didn't _completely_ gop away, but they got better enough to move onto other problems. That's my tuppence. Let's see what everyone else has to say! Cortland ====================== Original Message Follows ==================== >> Date: 18-Mar-98 06:05:20 MsgID: 1058-73949 ToID: 72146,373 From: "UMBDENSTOCK, DON" >INTERNET:[email protected] Subj: Islands -- Vcc, Ground Chrg: $0.00 Imp: Norm Sens: Std Receipt: No Parts: 1 While reviewing the EMI mitigation techniques of our engineers, a few of us have been debating the use of ground islands on a multilayer board. The designs have one layer for Vcc, one for ground and 2 signal layers. The Vcc layer is isolated into various islands. The debate involves the segregation of grounds. The benefit of isolating digital from analog ground is understood. The question is whether I/O ground should be isolated from processor ground. Some schools of thought say keep the ground plane whole for lowest impedance, stitching it to the chassis ground through conductive stand-offs periodically. Some prescribe segregating I/O from processor ground, being careful where to place chassis connection points to prevent ground loops and ground reference corruption. I would be interested in hearing from the forum what your pet approach is and why you believe it works for your situation. Thanks in advance for your comments. Don Umbdenstock Sensormatic Electronics Corporation ====================== End of Original Message =====================
