Hi Bill,

I missed your original posting (get hundreds of emails
daily). Got to www.cpcibackplanes.com. You may find help
there. That URL is the site of International Product Design,
a local company here in Los Gatos, CA, USA. Shawn Arnold is
one of the principles and I expect he can help.

Doug

"Fleury, Bill" wrote:
> 
> Judging from the number of responses (0) I got to my question about EMI
> problems from compactPCI backplanes I am assumiong that either no one uses
> cPCI backplanes or I'm the only one that has experienced problems when
> testing in this environment. I didn't think that ever happened in this
> group. I'll repost this just in case some of you didn't get the last one.
> 
> This is a question regarding systems which use CompactPCI bus architecture.
> On a cPCI backplane the PCI clock is routed to every slot on the backplane
> with up to 7 peripheral slots possible on a normal backplane. My question is
> this: With the cPCI specification calling out specific trace lengths for
> clock traces on both the backplane itself and on peripheral cards, have
> other people experienced any unique EMI problems in trying to meet the
> design constraints associated with this synchronous bus; especially where
> there are unpopulated slots on the backplane?
> 
> Please feel free to respond privately if the question is unclear. I wasn't
> sure if it was worded properly.
> 
> Thanks,
> 
> Bill Fleury
> 
> ***************Artesyn Communication Products, LLC******************
> ********************************************************************
> 
> Bill Fleury                     Email: [email protected]
> Compliance Engineer             Phone: 608-831-5500
> 8310 Excelsior Drive            Fax:   608-831-8844
> Madison, WI 53717
> 
> ********************************************************************
> "The difficult can be done immediately, the impossible takes a
> little longer"  (Army Corp of Engineers)
> 
> ******************* Visit us at www.artesyn.com/cp ******************
>  <<Bill Fleury (E-mail).vcf>>

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