Hello group, We have an emissions problem on a board and I would like to suggest a ground plane in the area of an RJ-45 jack (TNV-1). But we have always asked our PCB designers to leave TNV traces free of ground and power planes to avoid arcing during surge and dialectric strength tests.
Does anyone know where to find specs on breakdown voltages between PCB layers? Has anyone successfully used ground planes above or below TNV traces? We are testing to UL1950 and Part 68. Any input would be much appreciated. Thank you, David. David Gelfand Regulatory Approvals Group Leader Memotec Communications Inc. Montreal Canada ------------------------------------------- This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. To cancel your subscription, send mail to: majord...@ieee.org with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Jim Bacher: jim_bac...@mail.monarch.com Michael Garretson: pstc_ad...@garretson.org For policy questions, send mail to: Richard Nute: ri...@ieee.org