Glyn,
I just ran across this paper, which discusses in greater detail how lower ESD
voltages can sometimes create greater upset of electronic equipment than high
ESD voltages:

[496a] Fujiwara, Osamu, "An Analytical Approach to Model Indirect Effect
Caused by Electrostatic Discharge," IEICE Transactions on Communications,
vol. E-79B no. 4, pp. 483-489, Apr. 4, 1996.  (download from
http://search.ieice.or.jp/1996/pdf/e79-b_4_483.pdf)

                                                   John Barnes  Advisory
Engineer
                                                   Lexmark International

---------------------- Forwarded by John Barnes/Lex/Lexmark on 04/24/2001 11:26
AM ---------------------------


John Barnes
04/23/2001 10:56 AM

To:   "Glyn Garside(TUV)" <ggarside%[email protected]>
cc:
Subject:  Re: ESD generators max Contact discharge level  (Document link:
      JRBARNES Mail)

Glyn,
I have submitted a 21-page article on "Designing Electronic Equipment for ESD
Immunity" to Printed Circuit Design magazine. In my literature search, I read
over 70 books and nearly 1300 articles/papers/standards/application notes on
Electrostatic Discharge (ESD) and related subjects over the last five months
According to various authors, air-discharge voltages in the range of 4-6kV are
the most likely to upset electronic equipment.  At higher voltages you start
getting corona from the person/air-discharge tip, which:
1.  Slows down or eliminates the initial spike of the ESD zap, which
2.  Slows down the risetime of the ESD zap from 0.5-1ns to some 5-10ns, which
3.  Narrows the frequency range of the ESD zap from some 1-500MHz down to
1-60MHz or so, which
4.  Makes slots and other imperfections in shields look much smaller with
respect to the wavelengths of the ESD zap's
     magnetic and electric fields, greatly reducing leakage through the shields,
                 AND
     Making unterminated wires, loops, and patches look much smaller than the
wavelengths of the fields, greatly
     reducing coupling into victim circuits:
     *  A monopole (a wire sticking up from a groundplane) is a very efficient
antenna when its length is about
         n * lambda / 4, with n odd.
     *  A dipole is a very efficient antenna when its length is about n * lambda
/ 2, with n odd.
     *  A loop is a very efficient antenna when its length is about n * lambda,
with n odd.

There are a bunch of other effects, including resonances in shielded enclosures,
resonances with parasitic capacitance/inductance, dI/dt, etc.  But in general
the wider frequency range of low-voltage ESD has a much higher chance of
"getting" us than the high energy of high-voltage ESD.  If we use filters
without surge protection on input/output (I/O) lines, the energy that can sneak
through is proportional to the square of the ESD voltage.  So for direct
discharges, high ESD voltages will dump more energy into the circuit than low
ESD voltages, and thus increase the chances of damage/upset.

Since it only takes one coupling path and one susceptible circuit to clobber a
product, in our testing we need to make sure that we haven't left any "windows
of opportunity" open for ESD.  One author recommends ramping up the voltage for
ESD tests in 1kV steps.  All the others recommend using 2kV steps unless you
have reasons to suspect otherwise (such as a narrow window that showed up in a
similar product or earlier tests).  Quite a few authors also suggest testing to
at least 1-2kV above the specified limit to make sure you have some margin.  The
draft of EN 61000-4-2 that Doug Smith made available to us suggests using 2kV
steps in the absence of other requirements (page 21).

To reduce the confounding effect of relative humidity on corona and thus on air
discharges, all of the current ESD standards that I've seen basically specify
that:
1.  "the ESD simulator should approach the EUT as quickly as possible without
causing damage to the EUT or
      simulator"  (IEC 61000-4-2 draft page 21).
2.  "The simulator ... should be followed through until the electrode touches
the surface." (ditto).

                                              John Barnes  Advisory Engineer
                                              Lexmark International


[3] Electrostatic Discharge (ESD) Protection Test Handbook, 2nd ed.
KeyTek Instruments Corp., Burlington, MA, 1986.

[17] Boxleitner, Warren, Electrostatic Discharge and Electronic Equipment-- A
Practical Guide for Designing to Prevent ESD Problems.  IEEE Press, New York,
1989.

[32] Greason, William D., Electrostatic Damage in Electronics: Devices and
Systems.  John Wiley & Sons, New York, 1987.

[34] Hartal, Oren, Electromagnetic Compatibility By Design 4th ed.  R&B
Enterprises, West Conshohocken, PA, 1996.

[39] Kimmel, William D, and Gerke, Daryl D., Electromagnetic Compatibility in
Medical Equipment.  IEEE Press and Interpharm Press, Piscataway, NY, 1995.

[41] Kodali, V. Prasad, Engineering Electromagnetic Compatibility.  IEEE
Press, Piscataway, NJ, 1996.

[47] Mardiguian, Michel, Electrostatic Discharge: Understand, Simulate and
Fix ESD Problems.  Interference Control Technologies, Gainesville, VA, 1993.

[61] Perez, Reinaldo, Handbook of Electromagnetic Compatibility.
Academic Press, New York, 1995.

[385] Daout, B., Ryser, H., Germond, A., and Zweiacker, P., "The Correlation of
Rising Slope and Speed of Approach in ESD Tests," Electromagnetic
Compatibility 1987, Zurich, Switzerland, Mar. 3-5, 1987, pp. 461-466.

[386] Daout, B., and Ryser, N., "The reproducibility of the rising slope in ESD
testing," 1986 IEEE International Symposium on Electromagnetic Compatibility
Symposium Record, San Diego, CA, Sept. 16-18, 1986, pp. 467-474.

[496] Frei, S., Senghaas, M., Jobava, R., and Kalkner, W., "The Influence of
Speed of Approach and Humidity on the Intensity of ESD," Electromagnetic
Compatibility 1997, Zurich, Switzerland, Feb. 16-18, 1999, pp. 105-110.

[565] Greason, William D., "Generalized Model of Electrostatic Discharge (ESD)
for Bodies in Approach: Analyses of Multiple Discharges and Speed of Approach,"
Electrical Overstress/Electrostatic Discharge Symposium Proceedings,
Anaheim, CA, Sept. 26-28, 2000, pp. 54-59.

[575] Greason, William D., "Methodology to Simulate Speed of Approach in
Electrostatic Discharge (ESD)," Electrical Overstress/Electrostatic Discharge
Symposium Proceedings, Santa Clara, CA, Sept. 23-25, 1997, pp. 125-131.

[577] Greason, William D., "Methodology to simulate speed of approach in
electrostatic discharge," Journal of Electrostatics, vol. 44 no. 3-4, pp.
205-219, Sept. 1998.

[704] Katrak, Kerfegar K., "Human Body Electrostatic Charge (ESC) Levels: Are
They Limited by Corona Bleed Off or Environmental Conditions?," Electrical
Overstress/Electrostatic Discharge Symposium Proceedings, Phoenix, AZ, Sept.
12-14, 1995, pp. 73-85.

[1034] Richman, Peter, "Classification of ESD Hand/Metal Current Waves Versus
Approach Speed, Voltage, Electrode Geometry and Humidity," 1986 IEEE
International Symposium on Electromagnetic Compatibility Symposium Record,
San Diego, CA, Sept. 16-18, 1986, pp. 451-460.








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