Years ago in ultrasonic echocardiography instrumentation (the ultrasonics
analog is a wide band receiver listening in the 1-10MHz region down to less
than 10uV, so the digital had better be quiet!) which used a bit slice
architecture system containing Schottky logic with a clock of 20MHz for
controlling and manipulating images in real time. We're talking 4 PCBs
using 10 amps each board, so you can see the opportunity for generating
horrific noise that would be injected into the analog section. We found
that power distributed using a "tree" type of distribution where traces were
thick then thinner out at the extremities *and* +5 was over top of GND made
for the quietest distribution.
The tree technique worked much quieter than the "recommended" grid structure
where +5 distribution on bottom layer goes one direction with GND
distribution on the top going the other. This structure made little tiny
loop antennas that radiated energy all around inside the box and was awful!
But easier for the layout people.
- Robert -
Robert A. Macy, PE [email protected]
408 286 3985 fx 408 297 9121
AJM International Electronics Consultants
619 North First St, San Jose, CA 95112
-----Original Message-----
From: [email protected] <[email protected]>
To: ieee pstc list <[email protected]>
List-Post: [email protected]
Date: Thursday, April 18, 2002 12:49 AM
Subject: SV: Decoupling - capacitor values
>
>Correct, the picture is complex. The PCB is 2-layer with signal, 5V-power
>and 0V-ref lines routed on both sides. There is no ground layer/plane.
There
>must be a large number of RF current loops because the 0V-lines are routed
>up and down and around.
>Beside trying to achieve a good decoupling I assume that reducing loop area
>is the most important.
>
>Amund
>
>
>
>-----Opprinnelig melding-----
>Fra: Cortland Richmond [mailto:[email protected]]
>Sendt: 18. april 2002 00:54
>Til: [email protected]; ieee pstc list
>Emne: Re: Decoupling - capacitor values
>
>
>Yes, it makes sense. But the goal here is preventing or reducing Vcc drop
>during the time the microprocessor is switching. You need not only low
>reactance, but *also* enough capacitance to supply the current needed
>_while it is switching_. You have not given enough information here to tell
>if 820pF is sufficient.
>
>Regards,
>
>Cortland Richmond
>
>Amund Westin wrote:
>
>>> Insert a SMD ceramic capacitor of value 820pF in parallel with the
>existing
>100nF. The reason for the low value 820pF is because the capacitor
>self-resonance frequency is approximate 180MHz, and I believe it is
>important to choose a Cap value with a resonance frequency higher than the
>frequency we would like to decouple.
>
>Does it make sense?
>
><<
>
>
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