My understanding is that the main 2 effects of increased altitude on electronics are reduced effectiveness of forced-air and convection cooling methods and reduced dielectric strength of air-gaps (clearances).
We are looking into this to determine an altitude specification for a new product under development, and we intend to use a 3rd party lab to do hipot and temperature testing in an altitude chamber to determine our specs. I believe the effects are linear with altitude, from sea level up, however it occurred to me that there may be a simple rule of thumb along the lines of "up to approx. XXXX feet, you can expect very little effect". I realize that rules of thumb like this need to be treated with scepticism (hence my intent to test anyway), but I'm interested in peoples opinions and experiences. Thanks, Jim Eichner, P.Eng. Compliance Engineering Manager Xantrex Technology Inc. phone: (604) 422-2546 fax: (604) 420-1591 e-mail: [email protected] web: www.xantrex.com Confidentiality Notice: This email message, including any attachments, is for the sole use of the intended recipient(s) and may contain confidential and privileged information. Any unauthorized review, use, disclosure or distribution is prohibited. If you are not the intended recipient, please contact the sender by reply e-mail and destroy all copies of the original message. This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. Visit our web site at: http://www.ewh.ieee.org/soc/emcs/pstc/ To cancel your subscription, send mail to: [email protected] with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Ron Pickard: [email protected] Dave Heald: [email protected] For policy questions, send mail to: Richard Nute: [email protected] Jim Bacher: [email protected] Archive is being moved, we will announce when it is back on-line. All emc-pstc postings are archived and searchable on the web at: http://www.ieeecommunities.org/emc-pstc
