Dear David: Thank you for concise and reasoned response to my questions. The IEC Committee Draft on ESD (CDV) is a weighty document, and deserves many more hours of study and thought that I have been able to give it at this point.
I agree that the trend toward faster processor speeds will continue. That certainly will elevate the ESD-compliance challenge. But, we're already dealing with 2++ GHz processor speeds in our lab, and that is by no means the main ESD issue. The most difficult change over the past five years has been the trend toward low-voltage chips (Vdd <3 Volts). Designers used to have VOLTS of noise margin. Now they have tens of millivolts. Yet, we often observe ESD problems on new products that are the result of the same old "5 Volt" layout, grounding, and bypass techniques being applied. And, yes, I would much appreciate a copy of the IEEE Transaction of Failure Levels associated with ESD. You can send it to my Acme email address below. Thanks very much for your insights! Sincerely, Jim Ericson Quality System Manager/Sr. EMC Engineer Acme Testing Company [email protected] ----- Original Message ----- From: "Pommerenke, David" <[email protected]> To: "Jim Ericson" <[email protected]>; "emcpost" <[email protected]> Cc: "Pommerenke, David" <[email protected]> Sent: Tuesday, May 06, 2003 6:04 AM Subject: ESD test standard - present CDV - justification for changes Dear Jim, Thanks for taking the time to read the standard. Let me expand on the justification of the changes. Table of Content ---------------- 1) New current target 2) On the correlation problems with ESD testing 3) Specific answers to your points (marked by ### in your email) David Pommerenke University Missouri Rolla 1) New current target ===================== If you accept that a larger calibration bandwidth is needed (see my point (2)) then there is a need for a new target. The present target is only useful up to 1 GHz. Above 1 GHz targets that are build the "same" way differ a lot. The present target also has a high input impedance in the RF range (it reaches kOhm), so that the current is disturbed relative to a large ground plane. Now a target also needs to be calibrated, as one needs to determine if it fulfills its specification. This requires a either a network analyzer or a spectrum analyzer with tracking or a signal generator and a power meter. or a TDR in TDT arrangement. The good news is that this is only relevant for the manufacturer of the target, NOT FOR THE USER of the target. Now the construction of the new target is quite simple. I have made about 10 in the last years. There are also other constructions possible that are more simple. Note the target information is information, i.e., everyone can make their own target, as long as it measures correctly the construction does not matter. 2) On the correlation problems with ESD testing. ================================================ Every ESD test is a combination of many physical tests. Disruption or disturbance can be caused by: a) dielectric breakdown b) Current (ohmic loss -> thermal) c) Induction -> voltage -> oxid breakdown d) Induction -> current -> thermal e) Induction -> disturbance f) Ohmic voltage drop -> disturbance g) Inductive voltage drop -> disturbance And there are many more. For each of them the question: - Is an ESD test reproducible? Will have a different answer. For example, the dielectric breakdown is strongly related to the voltage, and the voltage of ESD generators is well controlled. Now modern ICs can react to pulses of about 50ps width (just look at your PC). Now, induction is a differentiation process, e.g., it is a high-pass filter. The high frequency components of the current and the transient fields will dominate the circuit response (in this case: mostly disturbance, not destruction). If you compare the high frequency components of different ESD generator currents and fields, you will see differences larger than 20dB. As a consequence, failure levels for fast ICs (disturbance) will vary as much as 1:5 if ONLY the ESD generator is changed. This has been observed in many Industry applications and tests and is the main driving force for improving the standard. We are in the process of publishing results of such correlation under well controlled conditions and the analysis of the reasons (correlation: ESD generator parameters vs. disturbance failure levels). The paper is in the review-process of the IEEE Transactions on EMC. I will not post it here while it is in review, but I can email a pre-print version to interested individuals. From: Jim Ericson [mailto:[email protected]] Sent: Tuesday, May 06, 2003 12:02 AM To: Pommerenke, David; emcpost Subject: Re: current-sensing transducer photos David: Thank you for the Committee Draft Version of the new ESD Standard. The committee is to be commended for producing such a thoroughly researched document that aims at improving test reproducibility of such a complex event as electrostatic discharge. While I am personally fascinated with the "scientific" aspects of ESD, I must say that the CDV rather took my breath away ... from the standpoint of ESD Current Target/Conical Adapter Line mechanical complexity ... to the cost implications for the EMC Laboratories and their clients. 4 GHz Current Targets, Network Analyzers, Oscilloscopes, and Electrostatic Voltmeters are far from trivial expenditures for any Laboratory. ##### Most test labs neither build ESD-current targets, not do they calibrate ESD generators themselves. For ESD-target and ESD-generator manufacturers, it is quire reasonable to expect that they can characterize the device they are building or calibrating. ##### I guess what I am missing is the underlying justification of need to change >from the current 1 GHz approach. ###### Please see my text above. There are more references that should be part of the CDV, they may also be in a "justification" document.##### I don't mean to beat this subject into a dead horse. I am not qualified to do that (even if I wanted to) either from experience or education. I would only make the following comments from my perceptions based on 7 years with an EMC Lab, and 18 years building, testing, and evaluating Silicon for a couple of semiconductor manufacturers: 1. In the several years of performing (or directly supervising) ESD Compliance testing at the lab, I have very seldom seen cases of correlation problems THAT WERE NOT FOUND TO BE THE RESULT OF ONE OR THE OTHER PARTIES FAILING TO FOLLOW THE EXISTING ESD STANDARD. ###### Following the standard is needed anyway. There are large problems with reproducibility for disturbances in fast systems. With increased use of fast ICs this would get worse and worse if not fixed now. Please see my comments above also. ####### 2. Our lab has often also been involved in testing multiple samples of various EUT models to 20 kV and beyond (for design verification, not Compliance). Very seldom was there any difficulty correlating with the manufacturer. 3. If good engineering practice is used in designing PCB layouts, wiring layouts, grounding, etc., even complex mixed-analog/digital EUTs can easily meet the 8 kV Air/4 kV Contact ESD requirements by a good margin. It's not that difficult to achieve. And that is a good thing, because the "real world" of carpeted environments and "floating" users often generates voltages substantially above 10 kilovolts. #### You are right, in most cases this should not be a large problems. Now if the board-layer count is reduced to save cost, no planes are allowed for the same reasons etc. ESD is a problem. Of course, with enough money used on boards and shielding ESD is not a problem. The same is true for emissions. ##### 4. In short, an EMC Lab is in the Compliance business, not the Science bus iness. The "real world" rationale of most EMC Standards is, by and large, clearly understood by me. I guess I am somehow missing said rationale for the 4 GHz CDV of the ESD Standard. ##### Note, only the ESD target is specified up to 4 GHz. The ESD generator is specified up to 2 GHz. There is an informative annex that contains transient field information (as a guideline to the manufacturers) that is valid up to 2 GHz. There is information on the voltage induced in a loop (informative annex, as a guideline for ESD generator manufacturers). This information is valid up to 4 GHz. ###### Sincerely, Jim Ericson Quality System Manager/Sr. EMC Engineer Acme Testing Company Acme, WA [email protected] This message is from the IEEE EMC Society Product Safety Technical Committee emc-pstc discussion list. Visit our web site at: http://www.ewh.ieee.org/soc/emcs/pstc/ To cancel your subscription, send mail to: [email protected] with the single line: unsubscribe emc-pstc For help, send mail to the list administrators: Ron Pickard: [email protected] Dave Heald: [email protected] For policy questions, send mail to: Richard Nute: [email protected] Jim Bacher: [email protected] Archive is being moved, we will announce when it is back on-line. All emc-pstc postings are archived and searchable on the web at: http://www.ieeecommunities.org/emc-pstc
