John,
 
one more stackup if you don't like running traces on the top and bottom layers:
 
 
John,
there are many ways to go. Here are two 8-layer stackups that should work well:
 
GND
SIG
PWR1
SIG
SIG
PWR2
SIG 
GND
 
 
Spacing between layers is be as small as 6 mils. The internal traces on layers
2 and 7 are 5 mils wide. The internal traces on layers 4 and 5 are 7 mils
wide.  
 
The spacing between layer 4 and layer 5 is 20 mils for a 63 mil board
thickness. If you provide GND flood on the SIG layers, the PWR plane impedance
will be low. The PWR layers can be run close to the edges of the board if you
stitch the GND planes together with vias every 1/4 inch. 
 
   Dave Cuthbert
 

From: [email protected] 
mailto:[email protected]] On Behalf Of [email protected]
Sent: Wednesday, December 08, 2004 3:38 PM
To: [email protected]
Subject: Design for emc and pcb stack-ups



Hello, 

I am embarking on an electronic design for a cctv camera that will employ 8 or
10 layer PCB. 
It will include a high speed DSP (400-600MHz internal clock) that requires
both 3V3 and 1V2 supplies 

I am considering employing dual power planes rather than segment a single
power plane. 

I would appreciate any feedback on... 

reference material that outlines pros/cons of either solution single or dual
plane. 
Material describing stack options for optimum emc - 8 or 10 layer? 

Most of the references I have reviewed do not directly address dual power
layers in the stack. 

Any comments appreciated. 

Thanks 
John Coyle
Senior Engineer
Video Systems
6554 - 176th Street
Surrey, BC Canada V3S 4G5
                                            _____  Honeywell 
604.574.1526 x8633                           [email protected] 
604.574.8523 Fax




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