>Well, that's BAD! Even if the output from the chipset were single-ended, >a well-designed transformer would produce a well-balanced signal from >the secondary, without any centre-tap at all. If the Rx input could >disturb the balance, it can quite easily be designed not to, using >established, not-costly techniques.
Not agreed. That also is right for LF, not for RF. EMI is about frequencies beyond those a transformer is build/designed for. For Common Mode RF current the transmit pair can be seen as a single wire, and the insulation barrier of the transformer as a capacitor. The CM current will go right trough it. Therefore the in/outputs of the ethernet chipsets are well balanced, and this property allows one to create a goor interface, with the help of the transformer, to improve the properties. It is not for nothing that ethernet magnetics consist of a complex set of a transformer, and (most often) 2 CM coils. One CM coil to create seria limpedance for the CM current, and to balance the Rx/Tx curent. Then a transformer to balance again, and again a CM coil to add CM impedance and help balancing. (BTW a transformer is a CM coil too, and it's operation is identical) At ethernet frequencies transformers and coils do not behave a perfect as the theory predicts. Far from that. The ferrite is loosing it's u (mu) (permeability) at these frequencies, and winding techniques minimize -but do not reduce to neglectable- the value of leakage inductance. Finally these winding techniques increase the capacitance between primary and secondary. Regards, Ing. Gert Gremmen [email protected] www.cetest.nl Kiotoweg 363 3047 BG Rotterdam T 31(0)104152426 F 31(0)104154953 Before printing, think about the environment. -----Oorspronkelijk bericht----- Van: [email protected] [mailto:[email protected]] Namens John Woodgate Verzonden: Thursday, September 30, 2010 11:08 AM Aan: [email protected] Onderwerp: Re: [PSES] EMI issue with Ethernet In message <[email protected]>, dated Thu, 30 Sep 2010, "ce-test, qualified testing bv - Gert Gremmen" <[email protected]> writes: >John, I am sorry to confuse you (and probably others), OK, confusion happens. > >A bad ground can couple CM energy through the center tap of the >Ethernet transformer right into both (in-phase) wires of transmit or >receive pair. > >Insufficiently grounded can IMHO also mean : >connected to a bad ground instead of a good ground. Agreed. > > > >The problems are often caused by segration of a motherboard PCB with >analog signal processing, power supply supply and a plug-in "PC-board" >with a Ethernet connection on it. > >If the ground of the plug-in board is not RF decently connected to the >mother board the ground of the plug-in board is dirty and a "bad >ground". Strictly, 'bad' is relative. The two grounds differ in potential: which one is 'bad' depends on which one you are standing on! I think this is an important concept. > >And as the motherboard is connected to the enclosure and most of the >other cabling too, that is a clean reference by definition. I'm not happy with such a definitive statement. See above. If you replace 'definition' by 'assumption', that better describes reality. > > >Most plug-in processors contain just a few ground pins were in fact a >full row along the side of the board is needed so as to create a real >low impedance path to ground. > >Not connecting the Ethernet transformer center-tap to ground of the >processor would allow the CM current from the chipset Rx and Tx pair >(and believe me they have) to the cable without attenuation. Well, that's BAD! Even if the output from the chipset were single-ended, a well-designed transformer would produce a well-balanced signal from the secondary, without any centre-tap at all. If the Rx input could disturb the balance, it can quite easily be designed not to, using established, not-costly techniques. -- OOO - Own Opinions Only. Try www.jmwa.demon.co.uk and www.isce.org.uk John Woodgate, J M Woodgate and Associates, Rayleigh, Essex UK If at first you don't succeed, delegate. But I support unbloated email http://www.asciiribbon.org/ - ---------------------------------------------------------------- This message is from the IEEE Product Safety Engineering Society emc-pstc discussion list. To post a message to the list, send your e-mail to <[email protected]> All emc-pstc postings are archived and searchable on the web at: http://www.ieeecommunities.org/emc-pstc Graphics (in well-used formats), large files, etc. can be posted to that URL. Website: http://www.ieee-pses.org/ Instructions: http://listserv.ieee.org/request/user-guide.html List rules: http://www.ieee-pses.org/listrules.html For help, send mail to the list administrators: Scott Douglas <[email protected]> Mike Cantwell <[email protected]> For policy questions, send mail to: Jim Bacher: <[email protected]> David Heald: <[email protected]> - ---------------------------------------------------------------- This message is from the IEEE Product Safety Engineering Society emc-pstc discussion list. To post a message to the list, send your e-mail to <[email protected]> All emc-pstc postings are archived and searchable on the web at: http://www.ieeecommunities.org/emc-pstc Graphics (in well-used formats), large files, etc. can be posted to that URL. Website: http://www.ieee-pses.org/ Instructions: http://listserv.ieee.org/request/user-guide.html List rules: http://www.ieee-pses.org/listrules.html For help, send mail to the list administrators: Scott Douglas <[email protected]> Mike Cantwell <[email protected]> For policy questions, send mail to: Jim Bacher: <[email protected]> David Heald: <[email protected]>
