In message <002301d0f04a$32a7faa0$97f7efe0$@westin-emission.no>, dated
Wed, 16 Sep 2015, Amund Westin <am...@westin-emission.no> writes:
I have a 450MHz spurious. Only 2 dB margin to limit EN55022 B.
Can see some potential loops on the PCB and will try to reduce the loop
area.
Or break the loops.
Using only 100nF as decouling caps (size 0603). If introducing a 100pF,
it decrease 450MHz by 6-7 dB. But adding different caps values may
introduce anti-resonant effects and other frequencies may increase.
What happens with smaller values? And 0402 is better for low inductance
I will have to do more investigations, but I will anyway add footprints
for additional caps close into the chip.
Any good / bad experience by adding different cap values for
decoupling?
When trying to 'fix' an existing PCB layout, you get good and bad
results because you can't change many things. This is a major reason why
EMC must be fully taken into account at the design stage.
I may also add more caps footprints spread on the pcb, as often
recommended in the literature. Any experience about spreading caps out
the on pcb?
In general, don't spread out parallel capacitors because the trace
inductances increase the probability of resonances.
--
OOO - Own Opinions Only. With best wishes. See www.jmwa.demon.co.uk
When I turn my back on the sun, it's to look for a rainbow
John Woodgate, J M Woodgate and Associates, Rayleigh, Essex UK
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