I want to monitor mains of polyphase power systems VA/VB/VC/VN using EN/UL
61010-1
Ratings: 400VL:N/G; 600/690 L:L CAT III, PD2, 3Km elevation
Issue I see is to get the phase to phase spacings on my terminal block.
Requirements in Annex K are 5.5mm at 2Km but go up to ~ 6.3mm at 3Km.
I would like to use a 4 position 7.62mm pitch terminal block and with oval pcb
pads we can manage 5.5mm spacing between the plated through hole pcb pads.
Hope to use a Phoenix Contact Combicon right angle header and matching terminal
plug.
Wire size max would be 14 AWG.
I could slot the pcb between phases and coat the pcb in this area with Humiseal
or similar.
A competitor is claiming the same specs using same standard using coatings/slot
but I do not see how they navigate the standard to claim their ratings
t
My take on the coating is that just reduces the effective pollution degree and
the tables give no relief in that regard at PD1.
Q - can the coating be considered more of a potting?
Q - Are there any angles to pursue that would give use what we want? Or other
ideas on how to terminate?
An alternative is to use a 5.08mm pitch 7 position terminal block and
depopulate the even positions.
Most of the larger pitch terminal blocks are designed for high current and are
too massive.
Your thoughts/suggestions?
Thanks
Chris Wells
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