Brian, for a rigorous determination of creepage and of clearance you need to also determine and assign:
1. Over-voltage Category ( affects Clearance ) 2. Pollution Degree ( micro-environment affecting Creepage ) 3. Basic (simple separation) or Reinforced (protective separation) boundaries (if the end-product standard distinguishes) If you can determine that slots are needed to increase a creepage path because of physical constraints, then the minimum allowable width of that slot needs to be determined. The application of std UL840 is permitted as an alternative for the determination of spacings, with some strings attached to the end-product standard ( e.g. UL1741 referencing UL840) Its a long and winding, foggy road to follow when determining minimum spacings for an electronic assembly. Isolation planning, assignment of working voltages (RMS and peak) across isolation boundaries is usually a good first step. Your MOSFET lead spacing doesnt need to follow PCB rules, but the PCB does. You may need to measure distance between PCB pads for the device and if then decide if those pads might need slots between them. Ralph From: Brian Gregory <[email protected]> Sent: Friday, April 26, 2024 4:12 PM To: [email protected] Subject: [PSES] Couple of loosely related safety questions 1. Clearances for US Safety: I'd cite the relevant standards, but they are so alike (identical Clearance tables), and so alike to UL 508, I'll defer. Here's the question: When citing clearance spacing from "uninsulated live components" does one measure from the edge of a PCB to the enclosure well, or only from the live components, like a pad, or the bottom pin of a thru-hole cap? 1a. what sort of passivation or RTV could make those live components not "uninsulated"? 2. Slots to increase creepage for high-voltage components A FET that's rated for say 600V does not have to follow PCB-creepage rules for 600V, is clearly stated places like UL 1741, §26.1.1 exception #8. For other components, like say 1000V caps in 0805 packages or FET driver chips the requirements aren't as clear. Is a slot needed to maintain creepage or not if the component is properly rated? It does appear from a TI support page for dual-bridge converters, that slots are recommended in order to prevent contamination that may compromise the components isolation performance. My gut says: no, slots are not needed between component terminals on a PCB, but could be recommended for sensitive parts, like FET drivers. Thoughts? Colorado Brian _____ This message is from the IEEE Product Safety Engineering Society emc-pstc discussion list. To post a message to the list, send your e-mail to [email protected] <mailto:[email protected]> All emc-pstc postings are archived and searchable on the web at: https://www.mail-archive.com/[email protected]/ <https://www.mail-archive.com/[email protected]/%20> Website: https://ewh.ieee.org/soc/pses/ <https://ewh.ieee.org/soc/pses/> Instructions: https://ewh.ieee.org/soc/pses/list.html (including how to unsubscribe) <https://ewh.ieee.org/soc/pses/list.html> List rules: https://ewh.ieee.org/soc/pses/listrules.html For help, send mail to the list administrators: Mike Sherman at: [email protected] <mailto:[email protected]> Rick Linford at: [email protected] <mailto:[email protected]> For policy questions, send mail to: Jim Bacher at: [email protected] <mailto:[email protected]> _____ To unsubscribe from the EMC-PSTC list, click the following link: https://listserv.ieee.org/cgi-bin/wa?SUBED1=EMC-PSTC <https://listserv.ieee.org/cgi-bin/wa?SUBED1=EMC-PSTC&A=1> &A=1 - ---------------------------------------------------------------- This message is from the IEEE Product Safety Engineering Society emc-pstc discussion list. To post a message to the list, send your e-mail to [email protected] All emc-pstc postings are archived and searchable on the web at: https://www.mail-archive.com/[email protected]/ Website: https://ewh.ieee.org/soc/pses/ Instructions: https://ewh.ieee.org/soc/pses/list.html (including how to unsubscribe) List rules: https://ewh.ieee.org/soc/pses/listrules.html For help, send mail to the list administrators: Mike Sherman at: [email protected] Rick Linford at: [email protected] For policy questions, send mail to: Jim Bacher: <[email protected]> _________________________________________________ To unsubscribe from the EMC-PSTC list, click the following link: https://listserv.ieee.org/cgi-bin/wa?SUBED1=EMC-PSTC&A=1
